Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training

Abstract

A real memristor crossbar has defects, which should be considered during the retraining time after the pre-training of the crossbar. For retraining the crossbar with defects, memristors should be updated with the weights that are calculated by the back-propagation algorithm. Unfortunately, programming the memristors takes a very long time and consumes a large amount of power, because of the incremental behavior of memristor’s program-verify scheme for the fine-tuning of memristor’s conductance. To reduce the programming time and power, the partial gating scheme is proposed here to realize the partial training, where only some part of neurons are trained, which are more responsible in the recognition error. By retraining the part, rather than the entire crossbar, the programming time and power of memristor crossbar can be significantly reduced. The proposed scheme has been verified by CADENCE circuit simulation with the real memristor’s Verilog-A model. When compared to retraining the entire crossbar, the loss of recognition rate of the partial gating scheme has been estimated only as small as 2.5% and 2.9%, for the MNIST and CIFAR-10 datasets, respectively. However, the programming time and power can be saved by 86% and 89.5% than the 100% retraining, respectively.

Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults

“…However, this is not valid for large CPAs or highly scaled metallic lines [27] (due to the size-dependent resistivity of Cu [50][51][52]), as the effects of the IR drops become notorious for the cells located away from the input terminals, resulting in a significant reduction of the voltage delivered to the cells located away from the input/output terminals. To the best of our knowledge, this is a limitation in the works of Mehonic et al [53] (from 2019), Dias et al [54] (2015), Zhang et al [55,56] (2019), Xia et al [22,26] (2017 and 2018), Woo et al [57] (2020), Huang et al [58] (2021), Yeo et al [59] (2019), and Van Pham et al [60] (2019).…”

“…Nonetheless, there are different approaches in this regard, these being the use of behavioural and compact SPICE/Verilog-A models. The former are quite extensive and allow a very realistic formulation of the pinched I-V characteristics of memristive devices (see the works from Van Pham et al [60] (2019), Cristiano et al [62] (2018), and Romero et al [63] (2019)), but this comes at the cost of increased computational requirements. Therefore, the latter are the most promising candidates for the simulation of large memristor-based ANNs.…”

“…However, they have larger area requirements, which threatens the integration density achievable with simpler structures. 1T1R structures were investigated for the case of pattern recognition by Van Pham et al [60] (2019) and Chen et al [21] (2015) but considering a hardware approach. Another example is works by Cristiano et al [62] (2019) and Romero et al [63] (2019), in which the authors considered a 2T2R+3T1C structure and two pairs of conductances per synaptic weight, further compromising the maximum achievable integration density.…”

“…Last but not least, it is worth mentioning that in five out of the 14 reviewed articles, no mitigation technique is discussed, showing that this is not the standard approach (Mehonic et al [53] (2019), Dias et al [54] (2015), Cristiano et al [62] (2018), Chen et al [21] (2015), and Huang et al [58] (2021)). Another three articles consider re-training approaches to overcome the non-functional RRAM cells (Xia et al [22] (2017), Yeo et al [59] (2019), and Van Pham et al [60]). This is an expensive approach in terms of computational complexity.…”

Resistive Switching Memory Devices Based on Body Fluid of Bombyx mori L.

“…The emergence of resistive memory has given researchers hope for solving these problems. Various dielectric layer materials for resistive memory have been reported [1,2,3,4,5,6,7], mainly including organic molecules and polymers (metal-organic complexes [8], poly(9-vinylcarbazole) (PVK) [9]), oxides [10,11,12] (TiO x [13,14,15], SiO x [16,17]), carbon-based materials [16,18,19], and perovskite-type complex oxides [20] (SrTiO 3 [21,22], BaTiO 4 [23,24], LaMnO 3 [25]). These resistive memories have the advantages of low cost, low power consumption, and multistate operation.…”