Performance advantage of schottky source/drain in ultrathin-body silicon-on-insulator and dual-gate cmos

Connelly, Daniel; Faulkner, C.; Grupp, D. E.

doi:10.1109/ted.2003.813229

Cited by 51 publications

(19 citation statements)

References 22 publications

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“…Therefore, it still makes sense to pursue approaches to lower the even though that is a much harder technological problem. This becomes absolutely critical in the Schottky-barrier version of the ultrathin body FET or DGFET where the "contact" size is constrained to be as small as the silicon body thickness [19], [20]. In the following sections, unless otherwise specified, contact resistance is kept fixed ( m and lateral contact length nm) while we focus on the impact of the LDG in the extension region.…”

Section: Effect Of Contact Resistancementioning

confidence: 99%

Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs

Shenoy

Saraswat

2003

IEEE Trans. Nanotechnology

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Extrinsic resistance due to contacts and nonabrupt lateral extension doping profile can become a performance-limiter in ultrathin body double-gate FETs (DGFET). In this paper, two-dimensional device simulations are used to study and optimize the extrinsic resistance in a sub-20 nm gate length DGFET. For a given lateral doping gradient, the extension doping needs to be offset from the gate edge by an amount called the underlap. The current drive, and hence transistor performance, is maximized when the underlap is chosen in such a way as to balance the impact of nonabrupt doping on the short channel effects and series resistance. This optimization depends upon the maximum allowed offstate subthreshold leakage current and the electrostatic integrity of the device structure.

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Section: Effect Of Contact Resistancementioning

confidence: 99%

Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs

Shenoy

Saraswat

2003

IEEE Trans. Nanotechnology

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“…2,3 In the case of barriers to electrons, among all existing metals, the rareearth ͑RE͒ elements ͑or lanthanides͒ are known to present the lowest Schottky barrier height ͑SBH͒ to n-Si ͑noted as ⌽ Bn ͒. In order to overcome these issues, it was proposed to replace highly doped S/D by metallic Schottky S/D.…”

Section: Introductionmentioning

confidence: 99%

Low Schottky barrier height for ErSi2−x/n-Si contacts formed with a Ti cap

Reckinger

Tang

Bayot

et al. 2008

Journal of Applied Physics

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Articles you may be interested inSchottky barrier heights of metal contacts to n -type gallium nitride with low-temperature-grown cap layerIn this paper, the formation of Er disilicide ͑ErSi 2−x ͒ with a Ti cap on low doping n-type Si͑100͒ is investigated. After deposition in ultrahigh vacuum, the solid-state reaction between Er and Si is performed ex situ by rapid thermal annealing between 450 and 600°C in a forming gas ambience with a 10 nm thick Ti capping layer to protect Er from oxidation. X-ray diffraction analyses have confirmed the formation of ErSi 2−x for all annealing temperatures. The formed films are found to be free of pinholes or pits and present a sharp and smooth interface with the Si bulk substrate. The extracted Schottky barrier height ͑SBH͒ corresponds to the state-of-the-art value of 0.28 eV if the annealing temperature is lower than or equal to 500°C. This result demonstrates the possibility to form low SBH ErSi 2−x / n-Si contacts with a protective Ti cap. However, when the annealing temperature is set to a higher value, the SBH concomitantly rises. Based on our experiments, this SBH increase can be mainly related to an enhanced diffusion of oxygen through the stack during the annealing, which degrades the quality of the ErSi 2−x film.

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“…Figure 16 shows the dual gate application of Schottky barrier contacts that was recently proposed and modeled theoretically. 51 The conducting channel is formed as an ultrathin (25 nm) silicon body with silicon-on-insulator (SOI) technology. Simulation studies suggest that Schottky source and drain offer significant performance improvement over doped source and drain.…”

Section: Schottky Junction Formationmentioning

confidence: 99%

Platinum and Rhodium Silicide–Germanide Optoelectronics

Lepselter¹,

Fiory

Ravindra

2007

Journal of Elec Materi

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Since the introduction of SiO 2 /Si devices in the 1960s, the only basic change in the design of a MOSFET has been in the gate length. The channel thickness has fundamentally remained unchanged, as the inversion layer in a silicon MOSFET is still about 10 nm thick. Bipolar transistor base widths have been of sub-micron dimensions all this time. It is time for a new property to be exploited in concert with the high mobility strained-silicon channels and silicon-germanium alloys. This property is the inherently low parasitic series resistance of Schottky barrier contacts. Schottky contacts, beam leads, and microbridges, while originally developed in silicon, have been successfully integrated into compound semiconductors for optoelectronics. Reintroduction of these technologies in optoelectronics based on silicon-germanium is proposed. Several new applications using platinum and rhodium compounds of silicon and germanium are presented.

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Performance advantage of schottky source/drain in ultrathin-body silicon-on-insulator and dual-gate cmos

Cited by 51 publications

References 22 publications

Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs

Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs

Low Schottky barrier height for ErSi2−x/n-Si contacts formed with a Ti cap

Platinum and Rhodium Silicide–Germanide Optoelectronics

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