Performance Analysis of First Order Digital Sigma Delta ADC

Integrating sigma-delta modulator (SDM) in FPGA causes to have quantization noise inside interested bandwidth. This paper compares and analyzes between two possible FPGA-based SDM structures which are non-noise shaper SDM and noise-shaper SDM. The difference between these two structures is in the integrator block. All other SDM constitutive components are the same for both structures. First-order noise-shaper SDM with its maximum integration for FPGA implementation is reported. The advantages of noise-shaper SDM over non-noise shaper SDM are the elimination of input peak signal error as well as the increment of input voltage range. Moreover, higher suppression in signal harmonics results in better reconstruction of input signal at the output. However, the most important outcome is the improvement of quantization noise shaping out of the interested bandwidth which results higher SNR at the output.

show abstract

Performance Analysis of First Order Digital Sigma Delta ADC

Cited by 11 publications

References 4 publications

Design and Implementation of Low Power GDI-LFSR at Low-Static Power Consumption

Design and Implementation of Low Power GDI-LFSR at Low-Static Power Consumption

Design and comparative analysis of on-chip sigma delta ADC for signal processing applications

A comparison between two different FPGA-based topologies of first order sigma-delta modulator

Contact Info

Product

Resources

About