Performance Analysis of Ultra Low-Power Mixed CNT Interconnects for Scaled Technology

Abstract

Ultralow power-efficient VLSI circuits design received wide attention due to rapid growth of portable applications. The portable domain places inflexible constraint on the power consumption. Though, device operating in subthreshold region shows huge potential towards satisfying the ULP requirement, it holds lots of difficult design issues. As integration density of interconnects increases at every technology node, increased delay and crosstalk effects may becomes a more challenging design problem particularly for subthreshold interconnects. Nanometer subthreshold global interconnect faces subthreshold driver design challenges and problems due to increased interconnect capacitance. This paper examined and compared the effect of crosstalk on delay for mixed wall carbon nano tube and Cu interconnects. This work reports new aspect ratio for global interconnect to reduce the effect of crosstalk on interconnect performance under subthreshold conditions.