Performance Investigation of Gate-All-Around Nanowire Fets for Logic Applications

Review—Methods in Improving the Performance of Carbon Nanotube Field Effect Transistors

“…Finally, to make this paper more useful for general audience, and to mention quantitative comparisons among all structures in trustworthy conditions, we compared conventional structure of CNTFET and some of its novel structures with Si-NW-FET and SiC-NW-FET 56 in terms of power-delay-product (PDP), delay, and current ratio. The investigated NW-FETs are Si and SiC types and their channel length is 10 nm, NW diameter is 1.23 nm, gate dielectric material is HfO 2 with 0.7 thickness, and V DD is 0.4 V. 56 To compare the structures in reliable conditions, we simulated CNTFET structures with (13,0) CNT as semiconductor, channel length of 10 nm, gate dielectric material of HfO 2 with 0.7 thickness, and V DS of 0.4 V which are very close to those in NW-FETs. Then PDP and delay of all structures have been compared with Si and SiC-NW FETs in Figures 15, 16, and 17.…”