Performance, Power and Cooling Trade-Offs with NCFET-based Many-Cores

Abstract

Negative Capacitance Field-Effect Transistor (NCFET) is an emerging technology that incorporates a ferroelectric layer within the transistor gate stack to overcome the fundamental limit of sub-threshold swing in transistors. Even though physics-based NCFET models have been recently proposed, system-level NCFET models do not exist and research is still in its infancy. In this work, we are the first to investigate the impact of NCFET on performance, energy and cooling costs in many-core processors. Our proposed methodology starts from physics, where the effects of ferroelectricity do occur, all the way up to the system level, where the performance and power of a many-core is ultimately affected. Our methodology allows for the first time the exploration of the new trade-offs between performance gains and power losses that NCFET brings to system-level designers. It demonstrates that an optimal ferroelectric thickness does exist. In addition, it reveals that current power management techniques fail when NCFET (with a thick ferroelectric layer) comes into play.

Impact of Negative Capacitance Field-Effect Transistor (NCFET) on Many-Core Systems

“…NCFET fundamentally changes the characteristics of transistors and therefore also changes the performance and power of circuits [19], single-core processors [1], and many-core processors [15]. This section demonstrates the impact of the thickness of the ferroelectric layer on the power and performance of a many-core processor.…”

“…Power and timing signoffs are performed for different NCFET configurations (TFE1 to TFE4) and different operating voltages. Further details of the experimental setup can be found in [15]. Figure 8.2a shows how NCFET increases the performance of a processor.…”

“…We thereby scale the leakage and dynamic power that is estimated by McPAT to estimate the power consumption of NCFETbased many-cores. For brevity, details on this approach are omitted here and can be found in [15].…”

“…Figure 8.4 shows the thermally sustainable utilization of two benchmarks bodytrack and swaptions during the parallel section of the benchmarks (Region of Interest) for different NCFET technologies. Other benchmarks are available in [15]. Swaptions is a highly compute-intensive task, which results in high power consumption and therefore, the thermally sustainable utilization in the baseline is low (only 8 out of 25 cores).…”

“…These investigations show that the optimal thickness of the ferroelectric layer depends on the application characteristics. Further investigations on how NCFET affects the performance in the case that cores are not operated at the peak V/f-levels can be read in [15]. These investigations additionally study forced-convection cooling (a heat sink with a fan) and reveal that the optimal thickness of the ferroelectric layer also depends on the cooling scenario.…”