Photolithographic system using modified illumination

Kamon, Kazuya; Miyamoto, Teruo; Myoi, Yasuhito; Fujinaga, M.; Nagata, Hitoshi; Tanaka, Masaaki

doi:10.1109/vlsit.1992.200672

Cited by 6 publications

(4 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In these systems the pupil was shaped using zoom optics, which enabled the degree of partial coherence to be varied. An integral part of the zoom lens was a pair of axicon elements to create annular shaped pupils [7] with variable ring thickness and ring position (see Fig. 4).…”

Section: Evolution Of Illumination Systems Toward Ultra-flexible Illumentioning

confidence: 99%

Evolution of illumination systems in microlithography: a retrospective

Herkommer

2010

SPIE Proceedings

View full text Add to dashboard Cite

show abstract

Section: Evolution Of Illumination Systems Toward Ultra-flexible Illumentioning

confidence: 99%

Evolution of illumination systems in microlithography: a retrospective

Herkommer

2010

SPIE Proceedings

View full text Add to dashboard Cite

show abstract

“…Over the past 2 decades, the k 1 factor has been reduced 5 by over 0.1 every 5 yr. Because image quality degrades noticeably when k 1 falls below 0.75, resolution enhancement techniques ͑RETs͒ such as modified illumination, 6 optical proximity correction 7 ͑OPC͒, and phase-shifting masks 8 ͑PSMs͒ have been used to improve image quality for lowk 1 lithography. These RETs have been successful 9 in reducing the k 1 factor to about 0.5.…”

Section: Introductionmentioning

confidence: 99%

Standard cell design with resolution-enhancement-technique-driven regularly placed contacts and gates

Wang

Wong²,

Lam

2005

J. Micro/Nanolith. MEMS MOEMS

View full text Add to dashboard Cite

The practicability and methodology of applying resolutionenhancement-technique-driven regularly placed contacts and gates on standard cell layout design are studied. The regular placement enables more effective use of resolution enhancement techniques (RETs), which in turn enables a reduction of critical dimensions. Although regular placement of contacts and gates adds restrictions during cell layout, the overall circuit area can be made smaller and the number of extra masks and exposures can be kept to the lowest by careful selection of the grid pitch, using template-trim chromeless phase-shifting lithography approaches, enabling unrestricted contact placement in one direction, and using rectangular rather than square contacts. Four different fabrication-friendly layouts are compared. The average area change of 64 standard cells in a 130-nm library range from Ϫ4.2 to Ϫ15.8% with the four fabricationfriendly layout approaches. The area change of five test circuits using the four approaches range from Ϫ16.2 to ϩ2.6%. Dynamic power consumption and intrinsic delay also improve with the decrease in circuits area, which is verified with the examination results. © 2005 Society of Photo-Optical Instrumentation Engineers.

show abstract

“…Over the past two decades, the factor has been reduced by over 0.1 every five years [4]. Because image quality degrades noticeably when falls below 0.75, resolution enhancement techniques (RETs) such as modified illumination [5], optical proximity correction (OPC) [6], and phase-shifting masks (PSMs) [7] have been used to improve image quality for low-lithography. These RETs have been successful in reducing the factor to about 0.5 [8].…”

Section: Introductionmentioning

confidence: 99%

Standard Cell Layout With Regular Contact Placement

Wang

Wong²,

Lam

2004

IEEE Trans. Semicond. Manufact.

View full text Add to dashboard Cite

The practicability and methodology of applying regularly placed contacts on layout design of standard cells are studied. The regular placement enables more effective use of resolution enhancement technologies, which in turn allows for a reduction of critical dimensions. Although placing contacts on a grid adds restrictions during cell layout, overall circuit area can be made smaller by a careful selection of the grid pitch, allowing slight contact offset, applying double exposure, and shrinking the minimum size and pitch. The contact level of 250 nm standard cells was shrunk by 10%, resulting in an area change ranging from 20% to +25% with an average decrease of 5% for the 84 cells studied. The areas of two circuits, a finite-impulse-response (FIR) filter and an add-compare-select (ACS) unit in the Viterbi decoder, decrease by 4% and 2%, respectively.

show abstract

Photolithographic system using modified illumination

Cited by 6 publications

References 1 publication

Evolution of illumination systems in microlithography: a retrospective

Evolution of illumination systems in microlithography: a retrospective

Standard cell design with resolution-enhancement-technique-driven regularly placed contacts and gates

Standard Cell Layout With Regular Contact Placement

Contact Info

Product

Resources

About