Arsenic (As + 150 keV, 1.0 × 10 13 cm −2 ) implanted p − -Si(100) wafers were spike annealed at 1100 • C for 1s in a commercially available rapid thermal annealing (RTA) system. Significant variations in sheet resistance were observed while As dopant profiles, measured by secondary ion mass spectroscopy (SIMS), were almost identical. Photoluminescence (PL) spectra were measured from all wafers under three different excitation wavelengths (532, 650 and 827 nm) at room temperature. PL spectra showed large intensity variation, corresponding to the sheet resistance. PL excitation wavelength dependence suggests the variation in density of residual damage as the possible cause of sheet resistance variation. Charge coupled devices (CCDs) have been widely used in scientific instruments and digital cameras until recently.1 The gate structure used in CCDs to transfer electrical charges (image data) to the edge of the sensor, requires a separate power source (more power) and sequential data transfer (slower speed).
2,3For portable device applications, smaller devices with low power consumption are strongly desired. Complementary metal-oxidesemiconductor (CMOS) image sensors, with reduced power consumption and fast data transfer, have become a common alternative choice for image sensors.3 These devices consist of large arrays of photodiodes and amplifiers. The photodiodes accumulate electrical charge and increase voltage when exposed to light. The voltage is amplified and transmitted as electrical signals. Since the CMOS image sensors have the same basic structure as CMOS memory devices, they are cost effectively mass produced, using well-established manufacturing technology.
1Generally, CMOS image sensors generate more electrical noise than CCDs and can result in poor image quality due to performance fluctuations in the large array of photodiodes and amplifiers.3 Small performance differences in photodiodes and amplifiers can result in noise in the output image. The noise problem increases as cell size is reduced and the number of cells in a chip increases. Noise reduction approaches commonly used to overcome this problem are; improved device level performance variation and reduction of the variation of background noise. Device-level noise reduction efforts are also becoming increasingly important. 4 High energy, low dose ion implant conditions are often used in CMOS image sensor fabrication processes. Average dopant concentration in the implanted junctions are 2 ∼ 3 orders of magnitude lower than those of advanced CMOS logic and memory devices. Small amounts of defects and residual damage have a significant impact in the electrical properties of implanted junctions after RTA. To reduce noise in CMOS image sensors, elimination of defects and residual damage are very important steps. The room temperature photoluminescence (RTPL) technique can be used for finding and reducing the electrically active and/or non-radiative defects and damage in the early stage of CMOS image sensor fabrication steps.It is well known that metal c...