Photon-counting chip for avalanche detectors

Zappa, Franco; Lotito, A.; Tisa, Simone

doi:10.1109/lpt.2004.838136

Cited by 16 publications

(10 citation statements)

References 10 publications

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“…5. This scheme has been originally proposed in [40,41]. In quiescence condition, the cathode of SPAD is biased to V dd through R1 and is ready to detect a photon.…”

Section: Operations and Circuits Of Siapdmentioning

confidence: 99%

CMOS silicon avalanche photodiodes for NIR light detection: a survey

Sultana

Kamrani

2011

Analog Integr Circ Sig Process

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This paper surveys recent research on CMOS silicon avalanche photodiodes (SiAPD) and presents the design of a SiAPD based photoreceiver dedicated to nearinfrared spectroscopy (NIRS) application. Near-infrared spectroscopy provides an inexpensive, non-invasive, and portable means to image brain function, and is one of the most efficient diagnostic techniques of different neurological diseases. In NIRS system, brain tissue is penetrated by near-infrared (NIR) radiation and the reflected signal is captured by a photodiode. Since the reflected NIR signal has very low amplitude, SiAPD is a better choice than regular photodiode for NIR signal detection due to SiA-PD's ability to amplify the photo generated signal by avalanche multiplication. Design requirements of using CMOS SiAPDs for NIR light detection are discussed, and the challenges of fabricating SiAPDs using standard CMOS process are addressed. Performances of state-ofthe-art CMOS SiAPDs with different device structures are summarized and compared. The efficacy of the proposed SiAPD based photoreceiver is confirmed by post layout simulation. Finally, the SiAPD and its associated circuits has been implemented in one chip using 0.35 lm standard CMOS technology for an integrated NIRS system.

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“…5. This scheme has been originally proposed in [40,41]. In quiescence condition, the cathode of SPAD is biased to V dd through R1 and is ready to detect a photon.…”

Section: Operations and Circuits Of Siapdmentioning

confidence: 99%

CMOS silicon avalanche photodiodes for NIR light detection: a survey

Sultana

Kamrani

2011

Analog Integr Circ Sig Process

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“…The smaller feature size of this process also assists in the miniaturisation of the device or pixel dimensions and allows high speed performance. This SPAD structure was adopted from earlier reported papers on fabricated SPAD structures [5][6][7][8]. However, the effective active area for the circuit was only 0.9 x 0.9 mm 2 because of the need to include interconnection pads.…”

Section: The Fabricated Spadmentioning

confidence: 99%

“…At each pixel, to increase the drive capability, there is an output buffer which consists of four cascaded inverters. This effect may also cause inconsistency the count rate [6,21]. Therefore there is a trade off between array size and functionality.…”

Section: Actively Quenched Spad Arraymentioning

confidence: 99%

Fully Integrated Linear Single Photon Avalanche Diode (SPAD) Array with Parallel Readout Circuit in a Standard 180 nm CMOS Process

Isaak

Bull

Pitter

et al. 2011

AIP Conference Proceedings

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This paper reports on the development of a SPAD device and its subsequent use in an actively quenched single photon counting imaging system, and was fabricated in a UMC 0.18μm CMOS process. A low-doped p-guard ring (t-well layer) encircling the active area to prevent the premature reverse breakdown. The array is a 16x1 parallel output SPAD array, which comprises of an active quenched SPAD circuit in each pixel with the current value being set by an external resistor R Ref =300 kΩ. The SPAD I-V response, I D was found to slowly increase until V BD was reached at excess bias voltage, V e = 11.03 V, and then rapidly increase due to avalanche multiplication. Digital circuitry to control the SPAD array and perform the necessary data processing was designed in VHDL and implemented on a FPGA chip. At room temperature, the dark count was found to be approximately 13 KHz for most of the 16 SPAD pixels and the dead time was estimated to be 40 ns.

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“…The SPAD to work properly requires a circuit that, after each avalanche pulse, quenches the avalanche and restores the bias voltage in order to detect another photon. Such circuits are commonly referred to as quenching-and-recharging circuits (QRCs) and can be implemented in passive, active or mixed fashion [1,[18][19][20][21][22][23][24]. In order to simulate an SPAD device and its QRC correctly, a suitable and accurate model of the diode is required.…”

Section: Introductionmentioning

confidence: 99%

Behavioral modeling of statistical phenomena of single‐photon avalanche diodes

Giustolisi

Mita

Palumbo

2011

Circuit Theory & Apps

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SUMMARYIn this paper, we present an accurate behavioral model for simulating single-photon avalanche diodes (SPADs). The device operation is described using the Verilog-A description language, which is an analog extension of the common digital hardware description language. The derived model is able to emulate the static, the dynamic behavior and the main statistical effects of an SPAD, such as the turn-off probability, the dark-count and the after-pulsing phenomena. Spectre simulations reveal the validity of the approach showing a good matching between the behavior of the proposed model and experimental results reported in the literature.

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Photon-counting chip for avalanche detectors

Cited by 16 publications

References 10 publications

CMOS silicon avalanche photodiodes for NIR light detection: a survey

CMOS silicon avalanche photodiodes for NIR light detection: a survey

Fully Integrated Linear Single Photon Avalanche Diode (SPAD) Array with Parallel Readout Circuit in a Standard 180 nm CMOS Process

Behavioral modeling of statistical phenomena of single‐photon avalanche diodes

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