Physical Model for the Steep Subthreshold Slope in Ferroelectric FETs

Abstract

Since many years, sub-60mV/decade switching has been reported in ferroelectric FETs. However, thus far these reports have lacked full physical explanation since they typically use a negative capacitance in the ferroelectric layer to be able to explain the experimental observations. Because negative capacitance as such is not a physical concept, we propose an alternative model that relies on the non-linear and non-equilibrium behavior of the ferroelectric layer. It is shown that a steep subthreshold slope can be obtained by a 2-step switching process, referred to as nucleation and propagation. Making use of the concept of domain wall motion as known also from fracture dynamics, we are able to explain the steep slope effect. A simple mathematical model is added to further describe this phenomenon, and to further investigate its eventual benefit for obtaining steep slope transistors in the sub-10nm era.Index Terms -FeFET, domain wall motion, polarization, dielectric response, steep subthreshold slope I.

Ferroelectric negative capacitance

“…The investigation in Ref. 86 of the effect of ramp rates for the applied bias showed that a slower ramp rate reduces the hysteresis, bringing the desired voltage amplification with subthreshold swings closer to the Boltzmann limit, suggesting that improvements in S are dominated by polarization dynamics rather than by the static NC effect 103 . Importantly, sub60 mV per decade S is usually observed only over a limited range of gate biases, which has been attributed to difficulties in main taining capacitance matching over the entire subthresh old region as well as in the ON state, owing to the fact that the semiconductor capacitance substantially changes from depletion to inversion.…”

Stepwise internal potential jumps caused by multiple-domain polarization flips in metal/ferroelectric/metal/paraelectric/metal stack

“…However, physical understanding of NC effects is still under intensive debate [25][26][27][28][29][30][31][32][33][34][35][36] . Experimentally observed NC effects are different from each other, and also from the concepts initially proposed.…”

“…For example, a feasibility of capacitance enhancement is explainable from a strong coupling between FE and PE layers [25][26][27] , while the transient NC is understandable from the viewpoints of overshoot in voltage supply or slower speed of charge compensation relative to polarization switching in FE-CAP [28][29][30][31] . In fact, it has been argued that NC region of FE material is intrinsically unstable or even impossible 32,33 . In addition, the SS improvements observed in FETs mostly suffer from critical problems that a large hysteresis is detected, a high voltage is needed and an operation frequency is limited in actual experiments [34][35][36] .…”

Compact Modeling of Multidomain Ferroelectric FETs: Charge Trapping, Channel Percolation, and Nucleation-Growth Domain Dynamics

“…This hints that the steep slope should be derivable from NVM-FeFET models based on e.g. domain switching dynamics [6,8,9]. This paper thus reports on a comprehensive FeFET CM aimed at addressing the aforementioned issues on the basis of our recent works [18,19].…”

“…VER since its advent, the CMOS-compatible (doped-)hafnia ferroelectric materials [1] have ignited a lasting enthusiasm in FeFET-based low-power non-volatile memories (NVM) [2,3]. More recently, the experimentally observed steep subthreshold slope in FeFETs [4,5] has further inspired its potential use in low-power logic technologies but also sparked heated discussions on its exact physical origin [6][7][8][9]. In the scenario of NVM, the memory window (MW) lies in the shift of the VTH state from high ("erased") to low ("programmed") by gate bias-programming [10], while for steep slope FeFETs (SSFeFETs) the so-called "voltage amplification" [6,7] is Fig.…”