PipeCNN: An OpenCL-based open-source FPGA accelerator for convolution neural networks

Abstract

Convolutional neural networks (CNNs) have been widely employed in many applications such as image classification, video analysis and speech recognition. Being computeintensive, CNN computations are mainly accelerated by GPUs with high power dissipations. Recently, studies were carried out exploiting FPGA as CNN accelerator because of its reconfigurability and energy efficiency advantage over GPU, especially when OpenCL-based high-level synthesis tools are now available providing fast verification and implementation flows. Previous OpenCL-based design only focused on creating a generic framework to identify performance-related hardware parameters, without utilizing FPGA's special capability of pipelining kernel functions to minimize memory bandwidth requirement. In this work, we propose an FPGA accelerator with a new architecture of deeply pipelined OpenCL kernels. Data reuse and task mapping techniques are also presented to improve design efficiency. The proposed schemes are verified by implementing two representative large-scale CNNs, AlexNet and VGG on Altera Stratix-V A7 FPGA. We have achieved a similar peak performance of 33.9 GOPS with a 34% resource reduction on DSP blocks compared to previous work. Our design is openly accessible and thus can be reused to explore new architectures for neural network accelerators.

Accelerating Deterministic and Stochastic Binarized Neural Networks on FPGAs Using OpenCL

“…The developed hardware architectures consist of C++ host controllers and multiple OpenCL kernels, which are accelerated using either an FPGA or a GPU. For x86-based systems, OpenCL accelerated kernels using FPGAs typically reside on an FPGA development board, which is connected to a separate independent host system through the PCIe express interface [2]. For ARM-based systems, the FPGA is typically connected to a Hard Processor System (HPS) on a SoC through specialized bridges, as in the case of the Intel DE1-SoC development board that we used here.…”

Convolutional Neural Networks on Embedded Automotive Platforms: A Qualitative Comparison

“…Our work completes their analysis. The group of Don Wang [17] developed an FPGA framework for image classification and a comparison of the CNN models AlexNet and VGG-16 [7] on both Altera and Xilinx FPGAs. In this case, the shortest classification time is achieved by Altera DE5-net and is 23 FPS for AlexNet and 1.4 FPS for VGG-16, with a power consumption of 27.3 Watt and 29.8 Watt respectively.…”

Benchmarking Deep Learning Frameworks with FPGA-suitable Models on a Traffic Sign Dataset

“…There are several OpenCL frameworks for DNN deployment on FPGAs. Among these available frameworks, we are using PipeCNN created by Wang et al [19], which is the only open-source one. Our next step is to deploy pretrained models to the FPGA using PipeCNN and investigate the real-time inference performance of the FPGA for different models and input image sizes.…”

“…ResNet-32 with input size 32 by 32 has only 0.46 million parameters, while AlexNet and VGG, both of which are used in the acceleration of CNNs on FPGAs by researchers like Suda et al[18] and Wang et al[19], have 60 million and 138 million parameters respectively.III. METHODOLOGYOur experiments are completed on a Ubuntu 16.04 LTS machine with an Intel i7-7700K 4.2 GHz CPU and an NVIDIA GTX 1050 Ti GPU with 16 GB memory.…”