Planar electron-tunneling Si/Si_0.7Ge_0.3triple-barrier resonant tunneling diode formed on undoped strain-relaxed buffer with flat surface

Abstract

We demonstrated a planar electron-tunneling Si/Si0.7Ge0.3 triple-barrier (TB) resonant tunneling diode (RTD) formed via a channel layer on an undoped strain-relaxed quadruple-Si1−xGex-layer (QL) buffer. Compared with a conventional vertical Si/Si0.7Ge0.3 TB RTD formed on a heavily doped QL buffer, the dislocation density is low, the surface is flat, and the resonance current density is much larger. These observations, together with analyses of current–voltage (I–V) curve fitting to the physics-based analytical expression, suggest that the enhanced I–V characteristics in the planar RTD are related to decreases in the number of crystalline defect states and the structural and potential fluctuations.

Hole-tunneling Si0.82Ge0.18/Si asymmetric-double-quantum-well resonant tunneling diode with high resonance current and suppressed thermionic emission

“…We previously reported that a narrowing in the coresonance broadening width in Si 1−x Ge x /Si DQW RTDs is partially caused from an increase in layer flatness, which will also increase the resonance current owing to a more laterally uniform potential. 12) The RMS value for the type-B RTD was typically 0.27 nm, which is smaller than those (∼1.1 nm) for the type-A RTDs by a factor of ∼4.1. No post-annealing to induce the thermal diffusion of impurities for the type-B RTD may result in a flatter surface leading to a larger J R than those for the type-A RTDs.…”

“…Si 1−x Ge x /Si RTDs have been designed for both hole tunneling [3][4][5][6][7][8][9][10][11] and electron tunneling. [12][13][14][15][16][17][18] Electron-tunneling Si 1−x Ge x /Si RTDs have been generally fabricated using a type-II band lineup with a tensile-strained Si well sandwiched by strain-relaxed Si 1−x Ge x barriers formed on a strain-relaxed Si 1−x Ge x buffer. To relax the Si 1−x Ge x buffer, misfit dislocations are generally introduced between the buffer and a Si substrate.…”