Planar Microspring—A Novel Compliant Chip-to-Package Interconnect for Wafer-Level Packaging

Abstract

In this paper, a novel compliant chip-to-package interconnect, planar microspring, is presented in terms of design consideration, wafer-level fabrication process and mechanical characterization. Several spring designs have been evaluated, and results indicate that a -shaped spring design produces a combination of high 3-D compliances and acceptable electrical parasitics. Further, numerical analyses on the -shaped microspring interconnect examined the dependence of mechanical and electrical performance upon geometry parameters. A wafer-level fabrication flow combining complementary metal oxide semiconductor (CMOS) back-end-of-line (BEOL) process and 3-D surface micromachining technique has been successfully implemented to create planar microspring interconnect prototypes with a fine pitch (100 m). The mechanical robustness of the prototype interconnects have been evaluated by nanoindentation. Finally, high-frequency electrical simulation suggested that the interconnect application can be extended up to 35 GHz without significant power loss.

A wafer-level multi-chip module process with thick photosensitive benzocyclobutene as the dielectric for microwave application

“…The measured transmission performance basically satisfies applications in the microwave frequency range when the thickness of each photo-BCB layer is nearly 25 μm. In traditional photo-BCB processes [13,20], since single BCB thickness is less than 15 μm, to achieve the same transmission performance, more layers of BCB and redistributions should be complemented, which is not economical and may cause a lot of other problems, such as thermal stress mismatch, etc. In contrast, fewer layers of the thick BCB mentioned here are enough to meet microwave requirements and step coverage.…”

“…Photo-BCB is also adopted as a multilayer dielectric based on the important fact that photo-resist performs as the mold of the electroplated structure. However, difficulties remain in how to obtain a high aspect ratio of exposed via-holes, how to break through the application limitation in the micro/millimeter-wave frequency system because of its thin film characterization [13] and how to overcome the step coverage of thin BCB film and the patterning of thick BCB film [10].…”

Wafer-level multilayer integration of RF passives with thick BCB/metal interlayer connection in silicon-based SiP

“…Monolithic microwave integrated circuit (MMIC) and MEMS chips can be embedded in the trenches on the substrate or stacked vertically on the surface of the substrate with flip-chip technology. In previous passive integrations using BCB (Liao et al 2009;Jeong et al 2000), the thickness of multilayer BCB is usually less than 15 lm, resulting in limited applications in microwave band. To obtain further less RF transmission loss and larger process tolerance, thick BCB layer is recommended.…”