PLL-based fractional-N frequency synthesizers

Zarkeshvari, F.; Noel, P.; Kwaśniewski, T.

doi:10.1109/iwsoc.2005.91

Cited by 2 publications

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“…For setting the delay of delay elements to t'd when N<Q<N+1 (a>0), the outputs of the N th and the (N+l)" 1 delay cells would send to phase detector with the probability of a and (1-a), respectively. It is equivalent to changing the divider index in a PLL-based fractional-N frequency synthesizer[78] with one exception; here the delay is modulating not the frequency. The same discussion can be made if N-1<Q<N and a<0.…”

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DLL-based fractional-N frequency synthesizers

Zarkeshvari¹

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confidence: 99%