2012 International Electron Devices Meeting 2012
DOI: 10.1109/iedm.2012.6479004
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Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETs

Abstract: We fabricated and characterized new ambipolar silicon nanowire (SiNW) FET transistors featuring two independent gate-all-around electrodes and vertically stacked SiNW channels. One gate electrode enables dynamic configuration of the device polarity (n or p-type), while the other switches on/off the device. Measurement results on silicon show I on /I off > 10 6 and S 64mV/dec (70mV/dec) for p(n)-type operation in the same device. We show that XOR operation is embedded in the device characteristic, and we demons… Show more

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Cited by 260 publications
(256 citation statements)
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“…DIG ambipolar FETs have been reported in some emerging technologies such as carbon nanotubes [12], graphene [13] and Silicon NanoWires (SiNWs) [14]. Among these technologies, SiNWs have a CMOS compatible fabrication process that can be easily integrated by the semiconductor industry [15].…”
Section: Ambipolar Sinwfet Ambipolar Transistors Are Double Indepmentioning
confidence: 99%
“…DIG ambipolar FETs have been reported in some emerging technologies such as carbon nanotubes [12], graphene [13] and Silicon NanoWires (SiNWs) [14]. Among these technologies, SiNWs have a CMOS compatible fabrication process that can be easily integrated by the semiconductor industry [15].…”
Section: Ambipolar Sinwfet Ambipolar Transistors Are Double Indepmentioning
confidence: 99%
“…Instead of the conventional selective doping process, reconfigurable FET technologies can change polarity (n-or p-type) during operation by setting a polarity gate electrode (PG) bias [3,4,5,6]. The type of charge carrier for the conduction is determined by the appropriate gate voltage tuning at the Schottky junction of the source region.…”
Section: Reconfigurable Operationmentioning
confidence: 99%
“…Unlike to the conventional complementary metal-oxide-semiconductor (CMOS) devices which have static electrical functions determined during the fabrication, reconfigurable FETs (RFETs) are dynamically programmable to n-or p-type FET by changing electric signals during the operation. Thus, it is desirable for the highly adaptable logic architectures with their enhanced functionality [3,4,5,6]. Reducing the power consumption is another technical issue for future logic device technology.…”
Section: Introductionmentioning
confidence: 99%
“…Various new technologies, such as FinFETs [4,7], and tunnel-FETs [8], have been developed in recent years to enable the continuation of Moore's law [9], but further development with current technologies are uncertain [10]. Other options are being explored as alternatives, which include semiconductor nanowire (SNW) based FETs [11][12][13], FETs comprised of 2D materials [14,15], and FETs with sophisticated gate structures [16], such as multiple independent gates [5,6] or a gate with embedded ferroelectric material [17]. There is, however, no clear pathway for overcoming a FET's intrinsic physical limitations [18][19][20] dictated by its operation mechanism, such as random dopant fluctuations [3] and gate fabrication complexities [21], and no viable rival technology currently exists.…”
Section: Introductionmentioning
confidence: 99%
“…Although FETs have evolved structurally from early planar to their current 3D geometries in parallel with the continual shrinkage of its lateral size, the basic operating principle remains the same. This has led to ever greater fabrication complexity, and ultimately to challenges in gate fabrication and doping control [2][3][4][5][6]. Various new technologies, such as FinFETs [4,7], and tunnel-FETs [8], have been developed in recent years to enable the continuation of Moore's law [9], but further development with current technologies are uncertain [10].…”
Section: Introductionmentioning
confidence: 99%