Polynomial-Time T-Depth Optimization of Clifford+T Circuits Via Matroid Partitioning

Abstract

Most work in quantum circuit optimization has been performed in isolation from the results of quantum fault-tolerance. Here we present a polynomial-time algorithm for optimizing quantum circuits that takes the actual implementation of fault-tolerant logical gates into consideration. Our algorithm re-synthesizes quantum circuits composed of Clifford group and T gates, the latter being typically the most costly gate in fault-tolerant models, e.g., those based on the Steane or surface codes, with the purpose of minimizing both T -count and T -depth. A major feature of the algorithm is the ability to re-synthesize circuits with additional ancillae to reduce T -depth at effectively no cost. The tested benchmarks show up to 65.7% reduction in T -count and up to 87.6% reduction in T -depth without ancillae, or 99.7% reduction in T -depth using ancillae.

Advantages of using relative-phase Toffoli gates with an application to multiple control Toffoli optimization

“…We illustrate how this works using the circuit from Figure 2(c) and observe that the arguments easily generalize to arbitrary k. Substituting relative phase and special relative phase-V pair implementations into the construction in Figure 2(c) replaces each relative phase Toffoli with a circuit containing 4 T gates. The total number of the T gates would thus be 48 (for arbitrary k, 16k − 32), higher than 40 [10]. However, observe that R 3 T OF and R • All ancillae in an unknown state, minimizing CNOT count.…”

“…Literature encounters two results, [10] and [7], both based on the optimization of [4, page 184]. In particular, [10] reports an optimized circuit with 15 T gates (down from unoptimized 21), and [7] observes that two Toffolis can be replaced with the relative phase Toffoli called the controlled-controlled-iX, Figure 3, which explains the optimization obtained in [10]. Our solution uses a somewhat simpler relative phase Toffoli, see Figure 3, dashed (gates 2-10), to obtain T OF 4 (a, b, c; d):…”

“…The resulting T -count of our construction is thus 16 = 4 + (7 − 3) + 4 + (7 − 3). Apart from the matching number of T gates, our solution contains fewer Clifford gates (e.g., 14 CNOTs vs 54 CNOTs in [10]), and may also be rewritten as a T -depth 4 circuit (T -depth 1 per each relative phase Toffoli stage) at the cost of a higher number of ancillae and a higher number of CNOT gates.…”

“…We can furthermore explain how to obtain the solution with 12k − 20 T gates to implement a kcontrolled Toffoli gate using k − 2 unrestricted ancillae featured in [10] without resorting to a computer optimization. This is done via the use of the relative phase Toffoli and Toffoli-V pair from Figure 3, dashed, and (3)-dashed, over the construction reported in Corollary 2.…”

Quantum Circuit Optimization by Hadamard Gate Reduction

“…The major obstacle facing the T -depth minimization techniques is the H gates since T gates cannot commute across such gates. For that reason, attempts for tackling this problem were either to reduce the T -depth for quantum circuits over the gate library {CNOT, T} or to extend the same approach for the Clifford+T library circuits by optimizing the T -depth of subcircuits between the H gates boundaries [9]. To the best of our knowledge, no one has studied the effect of minimizing H gates for reducing the T -depth so far.…”