2012
DOI: 10.1063/1.3679136
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Position-controlled [100] InP nanowire arrays

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Cited by 63 publications
(56 citation statements)
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“…In the case of InP nanowires, different crystalline growth directions have been achieved by engineering the gold catalyst [21][22][23][24][25], or by spontaneous kinking in the case of selfcatalyzed nanowires [26]. The resulting wires in 〈100〉 directions are defect-free [23]. Other directions, such as 〈112〉 exhibit twin planes non-perpendicular to the nanowire axis [20,27].…”
Section: Introductionmentioning
confidence: 99%
“…In the case of InP nanowires, different crystalline growth directions have been achieved by engineering the gold catalyst [21][22][23][24][25], or by spontaneous kinking in the case of selfcatalyzed nanowires [26]. The resulting wires in 〈100〉 directions are defect-free [23]. Other directions, such as 〈112〉 exhibit twin planes non-perpendicular to the nanowire axis [20,27].…”
Section: Introductionmentioning
confidence: 99%
“…This is the platform in use in all the microelectronics industry, as CMOS fabrication on [110] or [111] surfaces have traditionally been hampered by their inferior gate oxide reliability. Only few groups have reported on the growth of III-V nanowires in the [001] direction [38][39][40], which has the additional advantage of suppressing the formation of extended planar defects and polytypism within the nanowires. We recently reported on a new form of III-V compound semiconductor nanostructures growing epitaxially as vertical wing-shaped membranes on [001] silicon substrates by solid source molecular-beam epitaxy (MBE) [24].…”
Section: Introductionmentioning
confidence: 99%
“…Different techniques such as electron beam, nanosphere, nanoimprint or phase-shift lithography have been used for the definition of the patterns [45][46][47][48][49][50]. Only a few groups report on ordered growth of nanostructures on silicon (001) [35,51,52]. …”
Section: Introductionmentioning
confidence: 99%
“…Silicon (001) is the platform in use across the microelectronics industry, as CMOS fabrication on [110] reduction of structural defects and suppression of polytypism [35,36]. The ordered growth of III-V nanostructures has been intensively studied very recently in different material systems [26,35,[37][38][39][40][41][42][43][44]. Different techniques such as electron beam, nanosphere, nanoimprint or phase-shift lithography have been used for the definition of the patterns [45][46][47][48][49][50].…”
Section: Introductionmentioning
confidence: 99%
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