Power optimization of Sequential Circuits by Retiming and Rewiring

Jeddi, Zahra; Amini, Esmail

doi:10.1109/mwscas.2006.381798

Cited by 2 publications

(1 citation statement)

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“…Retiming is originally applied in [5] to reduce the iteration period of homogeneous synchronous dataflow graphs (HSDFGs), which is a special type of SDFGs. Retiming can also be used to optimize algorithms according to other criteria, such as minimizing the memory usage [2], extending the vectorization capabilities [6], and decreasing power consumption [7]. A great deal of research has been done on retiming in the context of HSDFGs [5], [8], [9], [10], [11].…”

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confidence: 99%

Efficient Retiming of Multirate DSP Algorithms

Zhu

Basten

Geilen

et al. 2012

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Multi-rate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow graphs (SDFGs). A lower iteration period implies a faster execution of a DSP algorithm. Retiming is a simple but efficient graph transformation technique for performance optimization, which can decrease the iteration period without affecting functionality. In this paper, we deal with two problems: feasible retimingretiming an SDFG to meet a given iteration period constraint; and optimal retiming -retiming an SDFG to achieve the smallest iteration period. We present a novel algorithm for feasible retiming and based on that one, a new algorithm for optimal retiming, and prove their correctness. Both methods work directly on SDFGs, without explicitly converting them to their equivalent homogeneous SDFGs (HSDFGs). Experimental results show that our methods give a significant improvement compared to the earlier methods.

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