Power prediction for Intel XScale/spl reg/ processors using performance monitoring unit events

Contreras, Gilberto; Martonosi, Margaret

doi:10.1109/lpe.2005.195518

Cited by 30 publications

(18 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Dynamic power management requires online monitoring of the consumed power. Since direct online measurement of power at high frequencies is impractical, proxies must be used to estimate it [2], [3], [4].…”

mentioning

confidence: 99%

See 1 more Smart Citation

A Study on the Use of Performance Counters to Estimate Power in Microprocessors

Rodrigues

Annamalai

Koren

et al. 2013

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

Abstract-We present a study on estimating the dynamic power consumption of a processor based on performance counters. Today's processors feature a large number of such counters to monitor various CPU and memory parameters such as utilization, occupancy, bandwidth and, page, cache and branch buffer hit rates. The use of various sets of performance counters to estimate the power consumed by the processor has been demonstrated in the past. Our goal is to find out whether there exists a subset of counters that can be used to estimate, with sufficient accuracy, the dynamic power consumption of processors with varying microarchitecture. To this end we consider two recent processor configurations representing two extremes of the performance spectrum, one targeting low power, while the other high performance. Our results indicate that only three counters measuring (i) the number of fetched instructions, (ii) level 1 cache hits and (iii) dispatch stalls, are sufficient to achieve adequate precision. These counters are shown to be effective in predicting the dynamic power consumption across processors of varying resource sizes achieving a prediction accuracy of 95%.

show abstract

mentioning

confidence: 99%

“…Performance counters have been widely used as proxies to estimate processor power online [2], [3], [4]. Often, the selected counters and the expressions used for power estimation (based on these counters) differ from one architecture to another.…”

mentioning

confidence: 99%

A Study on the Use of Performance Counters to Estimate Power in Microprocessors

Rodrigues

Annamalai

Koren

et al. 2013

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

show abstract

“…The regression-based power modeling approach used in TProf to account energy between concurrently executing tasks follows a long line of earlier work that derives power models using input from hardware performance counters [4,8,9,10,23,36]. Prior work establishes power models composed of linear or piecewise polynomial functions of sampled hardware event rates, using events that correlate strongly with power consumption.…”

Section: Related Workmentioning

confidence: 99%

“…Prior work establishes power models composed of linear or piecewise polynomial functions of sampled hardware event rates, using events that correlate strongly with power consumption. Such models derive power predictions within 5% or less of the actual power of multi-core processors with high design complexity [9].…”

Section: Related Workmentioning

confidence: 99%

TProf: An energy profiler for task-parallel programs

Manousakis

Zakkak

Pratikakis

et al. 2015

Sustainable Computing: Informatics and Systems

View full text Add to dashboard Cite

We present TProf, an energy profiling tool for OpenMP-like task-parallel programs. To compute the energy consumed by each task in a parallel application, TProf dynamically traces the parallel execution and uses a novel technique to estimate the per-task energy consumption. To achieve this estimation, TProf apportions the total processor energy among cores and overcomes the limitation of current works which would otherwise make parallel accounting impossible to achieve. We demonstrate the value of TProf by characterizing a set of task parallel programs, where we find that data locality, memory access patterns and task working sets are responsible for significant variance in energy consumption between seemingly homogeneous tasks. In addition, we identify opportunities for fine-grain energy optimization by applying per-task Dynamic Voltage and Frequency Scaling (DVFS).

show abstract

“…The dynamic power that is contributed by the activities in each IP is represented by linear regression as Eq. (1) [4], while the static power due to the leakage current is calculated as in Eq. (2) [5].…”

Section: Ap Power Estimationmentioning

confidence: 99%

Surface temperature-aware thermal management technique for mobile devices

Yim

Lee

Han

2014

IEICE Electron. Express

View full text Add to dashboard Cite

Recent demand on more advanced functionalities in mobile devices has led to a drastic increase in power consumption of the device. Therefore, heat dissipation has become a major concern. To effectively overcome the thermal barrier based on the surface temperature of mobile devices, we propose a surface temperature-aware thermal management (STaTM) technique to be incorporated into a mobile application processor (AP), which plays a key role in the heat management of the mobile device. The proposed STaTM enables the AP to maximize the energy efficiency using accuracy-enhanced rapid surface temperature estimation. Experimental results show that the proposed solution achieves an average performance improvement of 14.2% when compared to conventional thermal management techniques.

show abstract

Power prediction for Intel XScale/spl reg/ processors using performance monitoring unit events

Cited by 30 publications

References 9 publications

A Study on the Use of Performance Counters to Estimate Power in Microprocessors

A Study on the Use of Performance Counters to Estimate Power in Microprocessors

TProf: An energy profiler for task-parallel programs

Surface temperature-aware thermal management technique for mobile devices

Contact Info

Product

Resources

About