Power-pulsing schemes for vertex detectors at CLIC

Blanchot, G.; Dannheim, D.; Fuentes, Claudio

doi:10.1088/1748-0221/9/01/c01005

Cited by 10 publications

(10 citation statements)

References 4 publications

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“…Owing to their beam structure, linear colliders have a very low duty cycle; At CLIC collisions occur during less than 0.01 ‰ of the time. The idea to save power by switching some parts of the front-end electronics into a lower-power idle state between bunch trains is therefore attractive and has been studied in the past [10].…”

Section: Power Pulsing Of Front-end Electronicsmentioning

confidence: 99%

Silicon Vertex & Tracking Detectors for the Compact Linear Collider

Spannagel¹

2020

Proceedings of the 28th International Workshop on Vertex Detectors — PoS(Vertex2019)

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CLIC is a proposed linear e + e − collider with center-of-mass energies of up to 3 TeV. Its main objectives are precise top quark, Higgs boson and Beyond Standard Model physics. In addition to spatial resolutions of a few micrometers and a very low material budget, the vertex and tracking detectors also require timing capabilities with a precision of a few nanoseconds to allow suppression of beam-induced background particles. Different technologies using hybrid silicon detectors are explored for the vertex detectors, such as dedicated 65 nm readout ASICs, small-pitch sensors as well as bonding using anisotropic conductive films. Monolithic sensors are the current choice for the tracking detector, and a prototype using a 180 nm high-resistivity CMOS process has been designed and produced, and is currently under evaluation. Different designs using a silicon-oninsulator process are under investigation for both vertex and tracking detector. All prototypes are tested in laboratory and beam tests, and newly developed simulation tools combining Geant4 and TCAD are used to assess and optimize their performance. This contribution gives an overview of the R&D program for the CLIC vertex and tracking detectors, highlighting new results from the prototypes.

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Section: Power Pulsing Of Front-end Electronicsmentioning

confidence: 99%

Silicon Vertex & Tracking Detectors for the Compact Linear Collider

Spannagel¹

2020

Proceedings of the 28th International Workshop on Vertex Detectors — PoS(Vertex2019)

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“…Data is read-off each of the 12 chips in a half-ladder in turn. This power-pulsing strategy reduces the power dissipated in the vertex detector region by several orders of magnitude, and has been demonstrated in the lab [10]. Power will be delivered to the CLICpix ASICs along thin aluminium flex cables by controlled current sources sitting outside of the vertex detector region.…”

Section: Power-pulsing and Deliverymentioning

confidence: 99%

R&D for the Vertexing at CLIC

Redford¹

2015

Proceedings of the 23rd International Workshop on Vertex Detectors — PoS(Vertex2014)

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The Compact Linear Collider is a candidate to be the next high-energy particle physics collider. Using a novel acceleration technique, electrons and positrons would be brought into collision with a centre-of-mass energy of up to 3 TeV. Despite challenging levels of beam-induced background, this would provide a relatively clean environment in which to perform precision physics measurements. The vertex detector would be crucial in achieving this, and would need to provide accurate particle tracking information to facilitate secondary vertex reconstruction and jet flavour-tagging. With this goal in mind, current technological limits are being stretched to design a low occupancy, low mass and low-power dissipation vertex detector for CLIC. A concept comprising thin hybrid pixel detectors coupled to high-performance readout ASICs, power-pulsing and air-flow cooling is under development. In this paper, the CLIC vertex detector requirements are reviewed and the current status of R&D on sensors, readout, powering, cooling and supports is presented.

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“…The average power consumption during the experiment conditions is dominated by the "power-off" state, and could be minimised in future versions by optimising the range of the power-off DACs. A reasonably low power consumption during the "power-on" state is required in order to match the instantaneous power consumption that can be delivered to the detector, which is foreseen to reach a few W/cm 2 [12], and also to have the possibility to operate the chip in lab and beam tests with continuous power and without the use of additional cooling. Additionally, in view of future HV-CMOS developments, the power consumption can be used as a reference for applications with different powering schemes.…”

Section: Measurements With Test Pulsesmentioning

confidence: 99%

Design and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector

et al. 2017

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A: The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active High-Voltage CMOS sensor, designed to be capacitively coupled to the CLICpix2 readout chip. The chip is implemented in a commercial 180 nm HV-CMOS process and contains a matrix of 128 × 128 square pixels with 25 µm pitch. First prototypes have been produced with a standard resistivity of ∼ 20 Ωcm for the substrate and tested in standalone mode. The results show a rise time of ∼ 20 ns, charge gain of 190 mV/ke − and ∼ 40 e − RMS noise for a power consumption of 4.8 µW/pixel. The main design aspects, as well as standalone measurement results, are presented. K: Analogue electronic circuits, Pixelated detectors and associated VLSI electronics, Front-end electronics for detector readout, VLSI circuits This work was carried out in the framework of the CLICdp collaboration.

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Power-pulsing schemes for vertex detectors at CLIC

Cited by 10 publications

References 4 publications

Silicon Vertex & Tracking Detectors for the Compact Linear Collider

Silicon Vertex & Tracking Detectors for the Compact Linear Collider

R&D for the Vertexing at CLIC

Design and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector

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