Pragmatic router FIB caching

Gadkari, Kaustubh; Weikum, M. Lawrence; Massey, Dan; Papadopoulos, Christos

doi:10.1016/j.comcom.2016.02.006

Cited by 6 publications

References 4 publications

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Effective cache replacement policy for packet processing cache

Yamaki

2020

Int J Communication

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SummaryOwing to the explosive increase in Internet traffic, increasing the throughput and energy efficiency of core routers is an important issue for future internet. Accessing the ternary content addressable memory (TCAM) in a core router can significantly degrade its throughput and energy efficiency owing to its low operating frequency and power consuming operations. To improve the throughput and energy‐efficiency of core routers, packet processing caches (PPCs) can be potentially used. PPCs can reduce the number of TCAM accesses by storing the TCAM lookup results in a fast and low‐energy cache memory and reusing them to process subsequent packets. To enhance the PPC performance, it is important to reduce the number of PPC misses. However, the PPC miss rate of the state‐of‐the‐art PPC is still high owing to its small capacity. In this study, we propose an effective cache replacement policy, called elevator cache (ELC) to improve the PPC miss rate. Our simulation results showed that the 8‐way ELC, which can be implementable at low hardware cost, reduced the number of PPC misses by 17.1% and 5.67% in comparison to the 4‐way least recently used (LRU) and the 4‐way ELC, respectively. Consequently, it was found that the 8‐way ELC can achieve a 1.21 times higher throughput (560 Gbps) while consuming 83% energy in comparison to conventional PPCs.

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