Process development to enable 3D IC multi-tier die bond for 20μM pitch and beyond

Hu, Yingzhe; Liu, C. S.; Chen, M. T.; Cheng, Mu-Huo; Kuo, H. J.; Lii, Mirng-Ji; Manna, A. La; Rebibis, Kenneth June; Wang, T.; Huylenbroeck, Stefaan Van; Daily, Robert; Capuz, Giovanni; Velenis, Dimitrios; Beyer, Gerald; Beyne, Eric; Yu, Douglas

doi:10.1109/ectc.2014.6897342

Cited by 10 publications

(3 citation statements)

References 1 publication

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“…T designed in this way to allow the TCB process. Scanning images of both top and bottom On each chip stack, there ar kaging Technology Conference d underfill -process and Francisco Cadacio Jr. 1 , ela Pedreira 1 , Carine Gerets 1 , C) Ltd., Singapore irect bonding [6,7] or insertion ng bump size and pitch, BLT is ed and becoming increasingly to achieve good filling results. work of TCB process is very f pre-applied underfill materials, ver, a pre-applied underfill can ents to clean the bumps at the process itself.…”

Section: Test Vehicle Descriptionmentioning

confidence: 99%

Thermal compression bonding of 20 μm pitch micro bumps with pre-applied underfill - Process and reliability

Teng

Messemaeker

Cherman

et al. 2015

2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)

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Thermal compression bonding (TC combination with a pre-applied underfill developed and investigated for assembling based micro bumps. It is found bonding for impact on the joint formation behavior. A produces bump joints with heavier underfi incompletely reacted solder. A higher bond more solder squeezing-out, leaving a thi reacted inter-metallic compound (IMC) la Electrical measurement of the daisy chains chips does not reveal any significant diffe samples made with different bonding forces the two types of joints were further stud bonding tests, namely the resistance meas chains at an elevated temperature and st cycling test. Both tests show a better reliab from the bump joints with less underfil completely reacted IMC layer.

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Section: Test Vehicle Descriptionmentioning

confidence: 99%

Thermal compression bonding of 20 μm pitch micro bumps with pre-applied underfill - Process and reliability

Teng

Messemaeker

Cherman

et al. 2015

2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)

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“…The comprehensively used die-to-wafer stacking method is flip chip bonding with Cu pillars or micro-bumps. [1][2][3][4][5][6] Using a pre-applied waferlevel underfill (WLUF) and thermocompression bonding (TCB), high electrical yield and long-term reliability can be obtained. 3,4) However, if the further scaling of micro-bumps continues, the diameter of bumps will also scale down towards a few microns.…”

Section: Introductionmentioning

confidence: 99%

“…[1][2][3][4][5][6] Using a pre-applied waferlevel underfill (WLUF) and thermocompression bonding (TCB), high electrical yield and long-term reliability can be obtained. 3,4) However, if the further scaling of micro-bumps continues, the diameter of bumps will also scale down towards a few microns. It implies that the bump structure will get a high aspect ratio, which possesses a high risk of bump collapsing.…”

Section: Introductionmentioning

confidence: 99%

Fine-pitch bonding technology with surface-planarized solder micro-bump/polymer hybrid for 3D integration

Inoue¹,

Derakhshandeh²,

Lofrano³

et al. 2021

Jpn. J. Appl. Phys.

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The scaling of conventional solder-based flip chip bonding is facing its limitations due to thermal compression bonding overlay tolerance when using conventional bumping. To decrease the tolerance, planarization can be used to fabricate two flat surfaces for bonding. However, planarization of these soft and ductile surfaces is challenging by polishing. Here, we assess the creep-feed fly-cutting process, the so-called surface planer process for planarization of fine-pitch Sn bumps and polymer simultaneously. It is revealed that the polishing process causes a lot of scratches on the Sn and polymer surface; however, these surfaces are smooth for the case of the surface planer process. The planarized Sn and polymer surface has only a 50 nm step height which does not have any impact during thermal compression bonding. Using a planarized Sn and polymer surface, stacking of below 10 μm pitch has been achieved.

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Process Complexity and Cost Considerations of Multi-Layer Die Stacks

Velenis

Vos

Kim

et al. 2019

2019 International 3D Systems Integration Conference (3DIC)

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Process development to enable 3D IC multi-tier die bond for 20μM pitch and beyond

Cited by 10 publications

References 1 publication

Thermal compression bonding of 20 μm pitch micro bumps with pre-applied underfill - Process and reliability

Thermal compression bonding of 20 μm pitch micro bumps with pre-applied underfill - Process and reliability

Fine-pitch bonding technology with surface-planarized solder micro-bump/polymer hybrid for 3D integration

Process Complexity and Cost Considerations of Multi-Layer Die Stacks

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