2021
DOI: 10.35848/1347-4065/abd69c
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Fine-pitch bonding technology with surface-planarized solder micro-bump/polymer hybrid for 3D integration

Abstract: The scaling of conventional solder-based flip chip bonding is facing its limitations due to thermal compression bonding overlay tolerance when using conventional bumping. To decrease the tolerance, planarization can be used to fabricate two flat surfaces for bonding. However, planarization of these soft and ductile surfaces is challenging by polishing. Here, we assess the creep-feed fly-cutting process, the so-called surface planer process for planarization of fine-pitch Sn bumps and polymer simultaneously. It… Show more

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Cited by 9 publications
(3 citation statements)
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“…Owing to the difficulties in handling and electroplating thin TSV wafers (<200 μm), dry etching is often used to form blind vias prior to the deposition of insulating, barrier, and seed layers, followed by electroplating or electroless plating to fill the blind holes with metal. Subsequently, wafer thinning and chemical–mechanical polishing processes are used to expose the metal filling to form through vias [ 17 , 18 , 19 ]. Although dry etching during TSV preparation can be conducted at low temperatures without device damage, the high hardness and stability of diamonds cause various problems, such as low etching efficiency and complex process flow [ 20 ].…”
Section: Introductionmentioning
confidence: 99%
“…Owing to the difficulties in handling and electroplating thin TSV wafers (<200 μm), dry etching is often used to form blind vias prior to the deposition of insulating, barrier, and seed layers, followed by electroplating or electroless plating to fill the blind holes with metal. Subsequently, wafer thinning and chemical–mechanical polishing processes are used to expose the metal filling to form through vias [ 17 , 18 , 19 ]. Although dry etching during TSV preparation can be conducted at low temperatures without device damage, the high hardness and stability of diamonds cause various problems, such as low etching efficiency and complex process flow [ 20 ].…”
Section: Introductionmentioning
confidence: 99%
“…Experimental results showed that the average deviations in the X direction were reduced to 0.387 mm and 0.429 mm after precise positioning of the feature points, respectively. Some spatial welds are just oriented towards the relative regular curves such as spirals and coherent lines [14,15]. Not much attention is paid to the three-dimensional (3D) complex welding seams with an arbitrary shape.…”
Section: Introductionmentioning
confidence: 99%
“…These are either based on 3D sequential or monolithic integration requiring solder base micro bump interconnects and TSV's (Through Silicon Via). [1][2][3][4][5][6][7] Wafer-to-wafer direct hybrid bonding has recently been raised as one attractive stacking scheme enabling finer pitch interconnection, high-accuracy integration, and lower production cost. Direct bonding can now be performed at room temperature on a full wafer-level, because of the combination of the ultra-smooth surface obtained by chemical mechanical polishing (CMP) and the plasma activated dielectric surface.…”
mentioning
confidence: 99%