Proceedings. 2004 IEEE Computational Systems Bioinformatics Conference
DOI: 10.1109/nvmt.2004.1380830
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Progress on design and demonstration of the 4MB chalcogenide-based random access memory

Abstract: The first generation of C-RAM memory is designed to greatly exceed (in density, write speed, endurance) the existing non-volatile memory solutions for space and to close the gap that exists between system requirements and availability. Based on the success of the 64 kb C-RAM program, we are designing a 4 Mb C-RAM product implemented in 0.25 µm radiation-hardened CMOS. In this paper we present a description of the architecture and design of the prototype 4 Mb chalcogenide non-volatile memory and provide schemat… Show more

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Cited by 9 publications
(8 citation statements)
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“…Several technologies have been used: Charge Trap (SONOS in particular [14]- [16]) and, more recently, magnetic RAM [17], phase change [18]- [20], and ferroelectric memories [21]- [23] are being shipped or are under development. These devices are typically resistant up to 1 Mrad, thanks to robust cells (either intrinsically or because of the large feature size) and rad-hard peripheral circuitry.…”
Section: E Mainstream and Rad-hard Devicesmentioning
confidence: 99%
“…Several technologies have been used: Charge Trap (SONOS in particular [14]- [16]) and, more recently, magnetic RAM [17], phase change [18]- [20], and ferroelectric memories [21]- [23] are being shipped or are under development. These devices are typically resistant up to 1 Mrad, thanks to robust cells (either intrinsically or because of the large feature size) and rad-hard peripheral circuitry.…”
Section: E Mainstream and Rad-hard Devicesmentioning
confidence: 99%
“…The chalcogenide-based C-RAM memory stores information through changing the phase of the chalcogenide material which acts as the nonvolatile memory element between the amorphous and crystalline states to represent the "0" or "1" states respectively with the application of a current [5]. Limiting the amount of chalcogenide material is critical to minimizing the current required to cause a state transition.…”
Section: Memory Coresmentioning
confidence: 99%
“…In both of these cases, as with the MRAM developments, the chips have been developed for commercial applications. For space applications, BAE Systems has completed the design of a 4Mb radiation hardened C-RAM TM chip in radiation hardened 0.25um technology and it is currently in manufacturing [13]. The 132mm 2 chip is predicted to have a 70ns read access time.…”
Section: Enabling Computing Technologiesmentioning
confidence: 99%