Polar codes can provably achieve channel capacity and have been used in standards of the 5th generation wireless communication. As the first decoding algorithm of polar codes, successive cancellation (SC) suffers a significant error-correction performance loss at the moderate to short code length. The SC-Flip decoding aims to correct the first error in the SC decoding, and has the competitive error-correction performance compared with the SC decoding at the cost of high decoding latency. However, there may exist more than one errors in the SC decoding. Therefore, this paper proposes to enhance the fast-simplified SC (Fast-SSC) decoding to incorporate multiple bit-flipping, and further proposes two enhanced Fast-SSC-Flip decoding algorithms. One is a two-bit-flipping Fast-SSC (Fast-SSC-2Flip-E 2) decoding algorithm based on the distribution of the second error (E 2) in the Fast-SSC decoding, and is further expanded to flip multiple bits based on the distribution of multiple errors. The other is a partitioned Fast-SSC-Flip (PA-Fast-SSC-Flip) decoding algorithm. The Fast-SSC decoder tree is divided into several partitions, on which the Fast-SSC-Flip decoding is performed. Compared with the traditional Fast-SSC-Flip decoding, the proposed Fast-SSC-2Flip-E 2 has an error-correction performance gain up to 0.2 dB while keeping the average complexity close to that of the traditional Fast-SSC-Flip. The decoding speed of the PA-Fast-SSC-Flip is up to 6 times faster than that of traditional Fast-SSC-Flip, and has an error-correction performance gain up to 0.16dB. INDEX TERMS Polar codes, error-correction performance, fast-simplified SC flip decoding, partitioned decoding, multiple bit-flipping.