Q- and V-band MMIC chip set using 0.1 μm millimeter-wave low noise InP HEMTs

Abstract

A MMIC chip set for millimeter-wave (mmW) communication systems has been developed. The highlights are a 3-stage Q-band LNA with 2.0 dB NW 22 dB of gain and a 2-stage V-band LNA with 2.3 dB NFI 15 dB of gain. Altogether, 7 MMIC chips (2 LNAs, 2 mixers, 2 downconverters, and 1 LO amplifier) make up this effort to develop low noise mmW building block functions in the InP HEMT technology.INTRODUCTION The MMIC chip set described here represents critical con kponents in future lightweight communication satellite applications. Not only are there considerable size and weight reductions in implementing higher levels of integration such as a downconverter MMIC chip ( Figures 1 aitd 2), but the improved reliability from having fewer Figure 1. Q-band MMIC downconvertet macro-cell layout.con iponents makes the creation of MMIC building block functions highly desirable. Future satellitv payloads have a ]wed for size and weight reductions in the EHF payload without sacrificing the system performam e. InP HEMTs can play a major role in meeting those needs. The InP HEMT structure (also known as AlInAs/CaIrtAs HEMT) ha., produced the lowest reported dtvice noise figure pthiformance at 60 GHz (about 1 d R ) with 9 dB of associated gain and the highest cutoff frequency ( > 300 GJ-lz)l. This paper djscusstIs the fabric.ation process, model development, circuit design, and measured results of 7 MMIC building block chips. 1133CH 1577-4/95/0-1133$01.00 0 1995 IEEE Figure 2. V-band MMIC downconverter macro-cell layout.