Abstract-Analog-to-digital converters (ADC's) are ubiquitous, critical components of software radio and other signal processing systems. This paper surveys the state-of-the-art of ADC's, including experimental converters and commercially available parts. The distribution of resolution versus sampling rate provides insight into ADC performance limitations. At sampling rates below 2 million samples per second (Ms/s), resolution appears to be limited by thermal noise. At sampling rates ranging from 2 Ms/s to 4 giga samples per second (Gs/s), resolution falls off by 1 bit for every doubling of the sampling rate. This behavior may be attributed to uncertainty in the sampling instant due to aperture jitter. For ADC's operating at multi-Gs/s rates, the speed of the device technology is also a limiting factor due to comparator ambiguity. Many ADC architectures and integrated circuit technologies have been proposed and implemented to push back these limits. The recent trend toward single-chip ADC's brings lower power dissipation. However, technological progress as measured by the product of the ADC resolution (bits) times the sampling rate is slow. Average improvement is only 1.5 bits for any given sampling frequency over the last six-eight years.Index Terms-Analog-to-digital converters, aperture jitter, comparator ambiguity, input-referred noise, signal-to-noise ratio, spurious-free dynamic range.
Analog‐to‐digital converters (ADCs) continue to be important components of signal‐processing systems, such as those for mobile communications, software radio, radar, satellite communications, and others. This article revisits the state‐of‐the‐art of ADCs and includes recent data on experimental converters and commercially available parts. Converter performances have improved significantly since previous surveys were published (1999–2005). Specifically, aperture uncertainty (jitter) and power dissipation have both decreased substantially during the early 2000s. The lowest jitter value has fallen from approximately 1 picosecond in 1999 to < 100 femtoseconds for the very best of current ADCs. In addition, the lowest values for the IEEE Figure of Merit (which is proportional to the product of jitter and power dissipation) have also decreased by an order of magnitude. For converters that operate at multi‐GSPS rates, the speed of the fastest ADC IC device technologies e.g., InP, GaAs, is the main limitation to performance; as measured by device transit‐time frequency, f T , has roughly tripled since 1999. ADC architectures used in high‐performance broadband circuits include pipelined (successive approximation, multistage flash) and parallel (time‐interleaved, filter‐bank) with the former leading to lower power operation and the latter being applied to high‐sample rate converters. Bandpass ADCs based on delta‐sigma modulation are being applied to narrow band applications with ever increasing center frequencies. CMOS has become a mainstream ADC IC technology because it enables designs with low power dissipation and it allows for significant amounts of digital signal‐processing to be included on‐chip. DSP enables correction of conversion errors, improved channel matching in parallel structures, and provides filtering required for delta‐sigma converters. Finally, a performance projection based on a trend in aperture jitter predicts 25 fs in approximately 10 years, which would imply performance of 12 ENOB at nearly 1‐GHz bandwidth.
The investigation of high-field electronic conduction in metal-insulator-metal (MIM) or metal-insulator-semiconductor (MIS) structures utilizing dc methods is frequently complicated by the fact that the observed currents decay with time. In cases where this time dependence is caused by charge trapping in the insulating film, the most direct study of conduction involves a determination of the initial current, i.e., that which flows before charging becomes significant. Direct observation of this current is sometimes difficult because the onset of trapping can occur within either a very short time or a very short distance. In films characterized by trapping, the initial current can be determined by monitoring the time dependence of the charging process itself. This method requires the use of an MIS structure with a nondegenerate semiconductor, usually serving as a cathode. The state of charge of the insulator is determined by measuring the MIS flat-band voltage. The calculation, which assumes that the trapping of electrons is essentially permanent and that the current is determined by the magnitude of the electric field near the cathode, shows that over a significant interval of time the flat-band voltage has a logarithmic dependence, i.e., VFB∝ln(1+t/t0), where the quantity t0 is a characteristic time which is inversely proportional to the initial current. Hence, a measurement of t0 determines the conduction properties at a given field and temperature.
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