Quantitative Evaluation of Statistical Variability Sources in a 45-nm Technological Node LP N-MOSFET

Abstract

Abstract-A quantitative evaluation of the contributions of different sources of statistical variability, including the contribution from the polysilicon gate, is provided for a low-power bulk N-MOSFET corresponding to the 45-nm technology generation. This is based on a joint study including both experimental measurements and "atomistic" simulations on the same fully calibrated device. The position of the Fermi-level pinning in the polysilicon bandgap that takes place along grain boundaries was evaluated, and polysilicon-gate-granularity contribution was compared to the contributions of other variability sources. The simulation results indicate that random discrete dopants are still the dominant intrinsic source of statistical variability, while the role of polysilicon-gate granularity is highly dependent on Fermilevel pinning position and, consequently, on the structure of the polysilicon-gate material and its deposition and annealing conditions.

Contact resistivity and suppression of Fermi level pinning in side-contacted germanium nanowires

“…[1][2][3][4][5] Properties of electrode/NW contact-interfaces are of particular interest [6][7][8][9][10] due to the potential application of quasi-one-dimensional materials into future nanosensing and nanoelectronic devices. 11 It has been proposed by theory that Fermi level pinning effects, which frequently hinder the performance of planar devices, 12 are expected to be strongly reduced in side contacts to NW channels due to their confined geometry. 13,14 Although several studies regarding the contact-resistivity in semiconducting NW devices can be found, [6][7][8][9][10] an analysis addressing both the contact-interface properties and also verifying the plausibility of common bulk-based extrapolation methods is to-date not presented.…”

Geometry, Temperature, and Body Bias Dependence of Statistical Variability in 20-nm Bulk CMOS Technology: A Comprehensive Simulation Analysis

“…The simulator is meticulously calibrated and validated in respect of statistical variability simulations and measurements at 45/40 nm [19], and at 32/28 nm technology generations [14]. It has been demonstrated that that RDD, LER and MGG are major statistical variability sources in 32/28nm high-k/metal gate bulk CMOS technology.…”

“…This is based on meticulous validation of our simulation technology in respect of 45/40 nm [19] and 32/28-nm technology [14]. This paper also goes beyond most of the previously published simulation and measurement results, reporting a systematic study on the impact of geometry, substrate bias and temperature on the statistical variability of carefully designed 'template' 25 nm gate-length MOSFETs meeting the specifications of 20 nm CMOS.…”

Statistical aspects of NBTI/PBTI and impact on SRAM yield

“…Details about the device structure and doping profiles are published elsewhere [12,13]. We simulate NBTI variability associated with fixed/trapped random positive charges in concert with all other variability sources relevant for this technology.…”