Quantitative yield and reliability projection from antenna test results-a case study

Mason, P.; Cheung, Kin P.; Hwang, D.; Creusen, M.; Degraeve, R.; Kaczer, B.

doi:10.1109/vlsit.2000.852784

Cited by 9 publications

(7 citation statements)

References 3 publications

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“…AR eff = area of interconnect / area of thinned spot (3) As an illustration of the weakness of the AR definition in equation (1) it is assumed that eg. a large MOS device of 500µm 2 even with a very small polysilicon antenna can cause a worst case scenario regarding PID.…”

Section: Definition Of Antenna Ratiomentioning

confidence: 99%

“…A lot of literature [3,4,[6][7][8][9][10]18] has been published on the subjects: characterisation and assessment of PID. It is well documented that PID stress measurements have different sensitivities to PMOS and NMOS and thin and thick MOS oxides.…”

Section: Characterisation and Assessment Of Pidmentioning

confidence: 99%

“…This is not commonly done in industry, however, it has been illustrated here that it can play a significant role for the product lifetime predictions. For other gate oxide thicknesses and NMOS or PMOS other reliability stresses such as hot carrier stress or time dependent dielectric breakdown might be most critical with respect to PID [3,7,9]. During process development it can be investigated which reliability stress is the most sensitive to PID.…”

Section: Characterisation and Assessment Of Pidmentioning

confidence: 99%

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New approach for the assessment of the effect of plasma induced damage on MOS devices and subsequent design manual rules

Martin

2007

2007 IEEE International Integrated Reliability Workshop Final Report

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This paper develops a completely new approach for the definition of PID design rules which are relevant for IC design and also test structure layout. The required stress and measurement sequences for the assessment of PID effects and investigation of the design rules on the various geometries of MOS devices are described and discussed. The overall IC yield can be improved when some additional measures are considered and included in the product design.

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Section: Definition Of Antenna Ratiomentioning

confidence: 99%

Section: Characterisation and Assessment Of Pidmentioning

confidence: 99%

Section: Characterisation and Assessment Of Pidmentioning

confidence: 99%

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New approach for the assessment of the effect of plasma induced damage on MOS devices and subsequent design manual rules

Martin

2007

2007 IEEE International Integrated Reliability Workshop Final Report

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“…Ion current (I ion ) is almost constant during the entire period determined by an rf cycle, whereas electron current (I e ) exhibits characteristics varying with time. 15,30,42) Over the whole period of the rf cycle, the charges of ions impacting on a device are cancelled owing to the charge neutrality of plasma. Thus, the plasma charging current (I p ) through the device with an antenna ratio r is described by…”

Section: Plasma-induced Damagementioning

confidence: 99%

“…Since this charging damage is considered to be inevitable in present-day plasma equipment, the antenna design rules that limit the maximum r in circuits and the protection diode scheme have been introduced to minimize this damage. 28,29) It is widely believed that plasma charging current is determined by plasma parameters (plasma density and electron temperature 30) ) and the device layout design (antenna ratio and antenna aspect ratio): thus, one should consider the V th variations induced by the charging damage. Although various protection diodes are proposed and introduced into the circuit, the ability to suppress the charging damage is believed to be structure-dependent.…”

Section: Introductionmentioning

confidence: 99%

Comprehensive Modeling of Threshold Voltage Variability Induced by Plasma Damage in Advanced Metal–Oxide–Semiconductor Field-Effect Transistors

Eriguchi

Nakakubo

Matsuda

et al. 2010

Jpn. J. Appl. Phys.

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Threshold voltage shift (ΔV th) and its variation induced by plasma processing were investigated in detail. Two damage mechanisms occurring in an inductively coupled plasma reactor were focused on in this study; the charging damage induced by the conduction current from plasma and the physical damage attributed to the bombardment of high-energy ions. Regarding the charging damage, ΔV th was found to show a power-law dependence on antenna ratio for both SiO2 and high-k gate dielectrics in metal–oxide–semiconductor field-effect transistors (MOSFETs). The observed dependence was also confirmed from the results of a constant-current stress test, indicating that the plasma plays the role of the current source in terms of the charging damage. As for the physical damage, the recess structure in source/drain extension regions was focused on as a possible cause of ΔV th. The depth of the recess (d R) formed by the physical damage was studied using Si wafers exposed to various plasma conditions and subsequently analyzed for surface damage. The recess depth determined from the experiments and classical molecular dynamics simulations exhibits a power-law dependence on potential drop across the sheath between the plasma and the device surface (V p-V dc), which is used as a practical measure of the damage. On the basis of the above results, ΔV th due to the physical damage was calculated by technology computer-aided design (TCAD) device simulation for n- and p-channel MOSFETs with the recess structure. ΔV th shows a linear dependence on recess depth for both n- and p-channel MOSFETs, resulting in the power-law dependence on (V p-V dc) via d R. These findings provide a simple relationship among the variations of ΔV th, antenna ratio, and plasma parameters. By taking into account the findings that the MOSFET with high-k dielectrics shows a larger ΔV th due to the charging than that with SiO2, and that the MOSFETs with a smaller gate length indicate a larger ΔV th due to the Si recess structure, we can conclude that larger amount of plasma damage induces the larger ΔV th variations, i.e., the V th variability induced by the plasma damage is difficult to suppress and will become crucial to the fabrication of future advanced devices. The proposed relationship is useful as a guideline to suppress the ΔV th variations caused by plasma damage.

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Impact of MOSFET oxide breakdown on digital circuit operation and reliability

Kaczer¹,

Degraeve²,

Groeseneken³

et al.

International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138)

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Quantitative yield and reliability projection from antenna test results-a case study

Cited by 9 publications

References 3 publications

New approach for the assessment of the effect of plasma induced damage on MOS devices and subsequent design manual rules

New approach for the assessment of the effect of plasma induced damage on MOS devices and subsequent design manual rules

Comprehensive Modeling of Threshold Voltage Variability Induced by Plasma Damage in Advanced Metal–Oxide–Semiconductor Field-Effect Transistors

Impact of MOSFET oxide breakdown on digital circuit operation and reliability

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