2012
DOI: 10.5897/ijps12.094
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Quantum simulation study of gate-all-around (GAA) silicon nanowire transistor and double gate metal oxide semiconductor field effect transistor (DG MOSFET)

Abstract: In this paper, electrical characteristics of the double gate metal oxide semiconductor field effect transistor (DG MOSFET) and that of gate all around silicon nanowire transistor (GAA SNWT) have been investigated. We have evaluated the variations of the threshold voltage, the subthreshold slope, draininduced barrier lowering, ON and OFF state currents when channel length decreases. Quantum mechanical transport approach based on non-equilibrium Green's function method (NEGF) has been performed in the frame work… Show more

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Cited by 6 publications
(4 citation statements)
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“…Moreover, due to the shrinking of the device size to the sub-10 nm range, the classical drift-diffusion models are insufficient to characterize the electrical properties, and complete quantum transport models should be applied for accurate prediction of the device characteristics. The sub-10 nm node and reduced nanowire diameter necessitate consideration of the full quantum transport equation, which will include ballistic conduction, direct source-to-drain tunneling, and the quantum confinement effects [22]. In the absence of comprehensive analysis on charge plasma-based nanowire MOSFETs including quantum transport in the literature, we investigated the effects of three different gate oxide formations of charge plasma-based nanowire transistor (CPNWT) in terms of SCEs parameters such as I on , I off , subthreshold voltage (V th ), and DIBL incorporating the non-equilibrium green gunction (NEGF) method.…”
Section: Introductionmentioning
confidence: 99%
“…Moreover, due to the shrinking of the device size to the sub-10 nm range, the classical drift-diffusion models are insufficient to characterize the electrical properties, and complete quantum transport models should be applied for accurate prediction of the device characteristics. The sub-10 nm node and reduced nanowire diameter necessitate consideration of the full quantum transport equation, which will include ballistic conduction, direct source-to-drain tunneling, and the quantum confinement effects [22]. In the absence of comprehensive analysis on charge plasma-based nanowire MOSFETs including quantum transport in the literature, we investigated the effects of three different gate oxide formations of charge plasma-based nanowire transistor (CPNWT) in terms of SCEs parameters such as I on , I off , subthreshold voltage (V th ), and DIBL incorporating the non-equilibrium green gunction (NEGF) method.…”
Section: Introductionmentioning
confidence: 99%
“…Owing to their excellent gate controllability over the channel, [1][2][3][4] gate-all-around (GAA) metal-oxide-semiconductor field-effect transistors (MOSFETs) have been considered as one of the most promising candidates for the future CMOS generation. [5][6][7][8][9] Although the dimensions of semiconductor devices aggressively shrink down, these devices can still provide a better immunity to short channel effects, such as threshold voltage roll-off and drain-induced barrier lowering (DIBL). 3,5,10,11) As the channel length of MOSFET is projected to reach sub-7 nm regime in recent years, 12,13) it is widely investigated that quantum transport of electrons should be taken into account when describing the device properties.…”
Section: Introductionmentioning
confidence: 99%
“…14,15) In addition, the source-to-drain direct tunneling within MOSFETs in the subthreshold region is broadly recognized to play a role in the undesirable degradation of the subthreshold parameters. 8,[16][17][18] Since the ballistic characteristics are also significantly demonstrated in the ultrashort-channel devices, [19][20][21] it becomes increasingly necessary to develop a compact model for the cylindrical ballistic GAA MOSFET including both the source-to-drain tunneling and thermionic transport.…”
Section: Introductionmentioning
confidence: 99%
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