Quantum-wire effects in trigate SOI MOSFETs

Colinge, Jean–Pierre

doi:10.1016/j.sse.2007.07.019

Cited by 47 publications

(31 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The continuous decrease of the device dimensions leads to the appearance of Quantum effects, like Quantum confinement, volume inversion, and current oscillation, which introduces new challenges in device physics and modeling [15]. Carriers in narrow triple or quadruple FETs are confined in two directions (y and z), which are perpendicular to the direction of carriers flow x, as shown in Fig.…”

Section: Quantum Effectsmentioning

confidence: 99%

“…This causes the phenomenon of "volume inversion" which affects the mobility and threshold voltage behaviors [5][6][7][8][9][10][11][12][13][14][15][16]. Volume inversion is a phenomenon that happens to very thin film multi-gate SOI MOSFETs, in this case the inversion carriers are not confined near the surface of the film, but at its center [17].…”

Section: Quantum Effectsmentioning

confidence: 99%

“…Volume inversion is a phenomenon that happens to very thin film multi-gate SOI MOSFETs, in this case the inversion carriers are not confined near the surface of the film, but at its center [17]. The carriers concentration profile at V G = V TH + 0.7 in tri-gate SOI transistors in strong inversion for different square cross sections [15,16].…”

Section: Quantum Effectsmentioning

confidence: 99%

“…As the gate voltage increases, the electron concentration increases, so a larger number of sub-bands become populated. All these factors lead to inter-sub-band scattering between electrons from different energy sub-bands [15]. Inter-sub-band scattering increases with each new sub-band that becomes populated, which results in mobility reduction.…”

Section: Quantum Effectsmentioning

confidence: 99%

See 3 more Smart Citations

3D Multi-gate Transistors: Concept, Operation, and Fabrication

Shehata¹,

Gaber²,

Naguib³

et al. 2015

JEE

View full text Add to dashboard Cite

Abstract:The multi-gate transistors such as Fin-FETs, Tri-gate FETs, and Gate-all-around (GAA) FETs are remarkable breakthrough in the electronic industry. 3D Transistor is taking the place of the conventional 2D planar transistor for many reasons. 3D transistors afford more scalability, energy efficient performance than planar transistors and increase the control on the channel region to reduce the short channel effect, which enables us to extend Moore's law to further extent. In this paper, we will present a review about their structure, operation, types and fabrication.

show abstract

Section: Quantum Effectsmentioning

confidence: 99%

Section: Quantum Effectsmentioning

confidence: 99%

Section: Quantum Effectsmentioning

confidence: 99%

Section: Quantum Effectsmentioning

confidence: 99%

See 2 more Smart Citations

3D Multi-gate Transistors: Concept, Operation, and Fabrication

Shehata¹,

Gaber²,

Naguib³

et al. 2015

JEE

View full text Add to dashboard Cite

show abstract

“…Este fenômeno de natureza quântica foi descoberto por Balestra et al em transistores SOI MOSFET GAA (Gate-All-Around) [20] e também é observado em dispositivos SOI de porta tripla [21].…”

Section: Mobilidade Dos Portadores De Cargaunclassified

Efeito da radiação em transistores 3D em baixas temperaturas.

Caparroz¹

View full text Add to dashboard Cite

2017Este exemplar foi revisado e corrigido em relação à versão original, sob responsabilidade única do autor e com a anuência de seu orientador. Aos meus amigos Alberto, Vinícius, Tatsuo, Ferrari, Caio, Christian, Rangel, Sivieri, Luciano e Katia, por todo o profissionalismo, auxílio e experiência compartilhada e por terem tornado esses dois anos da minha vida mais divertidos e prazerosos. E a todos do Grupo SOI que contribuíram de forma direta ou indireta para o meu crescimento profissional e conclusão deste projeto. ABSTRACTThis master degree's dissertation aims to study the low temperature electrical behavior of tridimensional transistors on insulator (SOI FinFET) under the effects of proton radiation, through experimental methods and numeric simulations. Initially, it was compared the transistors' behavior before and after they have been subjected to proton radiation, at room temperature. This analysis was performed for both p-and nchannel devices, studying how the analog parameters change after the devices are irradiated by protons with approximately 60 MeV energy.The effects of total ionization dose on SOI FinFET devices were studied. These effects are manifested in different, very often opposing ways for nMOS and pMOS transistors. The radiation effects on the subthreshold slope (SS) in pFinFETs, for example, resulted in a switching speed improvement, while the nFinFETs were degraded. Also, the negative shift in the threshold voltage (VT), as most of the oxide trapped charges are positive, made the pMOS transistors more immune to the parasitic current at the second interface, and, again, the nMOS ones had their characteristics degraded.The wide-fin transistors have a bigger oxide area beneath the silicon film, which results in a greater charge buildup. Hence, the parameter degradation was more substantial than for narrow-fin devices. Short-channel transistors are subject to shortchannel effects and showed themselves more susceptible to proton irradiation at the subthreshold region.In addition to the basic parameter analysis, it was done a tradeoff analysis between three analog parameters: the transistor efficiency (gm/ID), the unit gain frequency (fT) and the intrinsic voltage gain (AV). They have been studied as a function of the inversion coefficient (IC), where it was possible to observe the devices' behavior for each inversion regime and, after, the best tradeoff between the parameters, for a given application.At low temperature, it was also observed that while pFinFETs have a better performance when looking at digital parameters VTH and SS after irradiation, nFinFETs showed more immunity to proton radiation when analyzed from their analog parameter with a more stable response to low temperatures.

show abstract

Gate Field Engineering and Source/Drain Diffusion Engineering for High‐Performance Si Wire Gate‐All‐AroundMOSFETand Low‐Power Strategy in a Sub‐30 nm‐Channel Regime

2016

MOS Devices for Low‐Voltage and Low‐Energy Applications

View full text Add to dashboard Cite

Quantum-wire effects in trigate SOI MOSFETs

Cited by 47 publications

References 27 publications

3D Multi-gate Transistors: Concept, Operation, and Fabrication

3D Multi-gate Transistors: Concept, Operation, and Fabrication

Efeito da radiação em transistores 3D em baixas temperaturas.

Gate Field Engineering and Source/Drain Diffusion Engineering for High‐Performance Si Wire Gate‐All‐AroundMOSFETand Low‐Power Strategy in a Sub‐30 nm‐Channel Regime

Contact Info

Product

Resources

About