Rank determination algorithm by current comparing for rank modulation flash memories

Kim, Mina; Shaterian, Mostafa; Twigg, C.M.

doi:10.1109/mwscas.2013.6674907

Cited by 9 publications

(5 citation statements)

References 9 publications

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“…State-of-the-art NAND flash chips pre-charge bit lines and monitor the discharge, or step the selected word line through each desired read voltage with dedicated capacitors in all bit lines [12]. The readout data are then latched into a page buffer, typically by fast static RAM cells.…”

Section: Discussionmentioning

confidence: 99%

“…Error correction and rewrite codes can also be implemented efficiently [2][3][4]. However, the read operations in RM are often regarded as problematic and slow, as normally N-1 read operation is needed to rank N cells [5]. In this paper, we review the improvement in reliability of RM under the same Vth variations, present testing data using commercially available flash chips to validate this conclusion, and then present an efficient read method based on relative sensing time, which can read out the entire rank information in one read cycle.…”

Section: Introductionmentioning

confidence: 99%

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Reliability and hardware implementation of rank modulation flash memory

Kan

et al. 2015

2015 15th Non-Volatile Memory Technology Symposium (NVMTS)

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Abstract-We review a novel data representation scheme for NAND flash memory named rank modulation (RM), and discuss its hardware implementation. We show that under the normal threshold voltage (Vth ) variations, RM has intrinsic read reliability advantage over conventional multiple-level cells. Test results demonstrating superior reliability using commercial flash chips are reviewed and discussed. We then present a read method based on relative sensing time, which can obtain the rank of all cells in the group in one read cycle. The improvement in reliability and read speed enable similar program-and-verify time in RM as that of conventional MLC flash.

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Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Reliability and hardware implementation of rank modulation flash memory

Kan

et al. 2015

2015 15th Non-Volatile Memory Technology Symposium (NVMTS)

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“…As a result, the probability of errors caused by the level changes can be remarkably reduced. Table III is the comparisons of three different memory architectures, rank modulation memory proposed in [8], con- ventional flash memory and this work. If there is N cells in a set, the WTA approach in [8] requires N × N-1 WTA for reading unlike N for others.…”

Section: B Programmed Current Change Over Timementioning

confidence: 99%

“…Table III is the comparisons of three different memory architectures, rank modulation memory proposed in [8], con- ventional flash memory and this work. If there is N cells in a set, the WTA approach in [8] requires N × N-1 WTA for reading unlike N for others. We tested both system WTA rank determination and this rank current comparing scheme.…”

Section: B Programmed Current Change Over Timementioning

confidence: 99%

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A Ramp Converter Approach to Rank Modulation

Kim

Twigg

2015

IEEE Trans. Circuits Syst. II

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Rank modulation is a new data representation method which can be used for flash memories and other types of non-volatile memories. This innovative technology does not use absolute values of cell levels, but instead uses relations in a group of memory elements. However, to establish rank modulation memory as a practical memory device, efficient and reliable rank determination (read circuitry) must be designed, and the characteristics of the rank modulation memory have to be explored with extensive research and experimental tests. This paper presents a rank modulation memory device which was fabricated in 0.35µm CMOS process. Rank read circuitry with current comparing scheme was integrated into the IC, and the rank determination ability was tested. Also, retention tests were performed to explore how the level changes affect cells ranks in an array of memory cells.

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Data archiving in 1x-nm NAND flash memories: Enabling long-term storage using rank modulation and scrubbing

Gad

Jiang

et al. 2016

2016 IEEE International Reliability Physics Symposium (IRPS)

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Rank determination algorithm by current comparing for rank modulation flash memories

Cited by 9 publications

References 9 publications

Reliability and hardware implementation of rank modulation flash memory

Reliability and hardware implementation of rank modulation flash memory

A Ramp Converter Approach to Rank Modulation

Data archiving in 1x-nm NAND flash memories: Enabling long-term storage using rank modulation and scrubbing

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