Rapid Design of Real-Time Image Fusion on FPGA using HLS and Other Techniques

Aydin, Furkan; Uğurdağ, H. Fatih; Levent, Vecdi Emre; Guzel, Aydin Emre; Annafianto, N. Fajar R.; Ozkan, M. Akif; Akgun, Toygar; Erbas, Cengiz

doi:10.1109/aiccsa.2018.8612836

Cited by 4 publications

(3 citation statements)

References 9 publications

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“…For simplifying the computation, we used the temporary parameters temp 0 and temp 1 to convert intersection computation into if-else method, which are expressed as Eq. (5)(6)(7)(8)(9).…”

Section: ) Row Density Modelmentioning

confidence: 99%

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A New Automatic Real-Time Crop Row Recognition Based on SoC-FPGA

Zhang

et al. 2020

IEEE Access

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With the development of artificial intelligence technology, agricultural robot plays a significantly important role for agricultural intelligence. Crop row line detection is a critical and fundamental step for agricultural robot navigation. Although there are some crop row lines detection methods, few of them can meet the real-time requirement for agricultural robot under complex fields conditions. In view of this, a real-time crop detection system implemented on a SoC FPGA (System-on-a-Chip Field Programmable Gate Array) is first proposed in this paper, which contains crop segmentation and crop row detection, where we design parallel pipeline architecture to enhance real-time performance by using line buffer and sliding windows technologies. At the same time, the fixed point representation is used to reduce the memory resource in this system. The proposed system is evaluated and implemented on Xilinx Zynq UltraScale+ MPSoC ZCU102 SoC-FPGA. The experimental results show that the proposed system can process an image with 1920×1080 resolution only within 210 ms with the average accuracy of 89.7%, which satisfies the real-time requirements of the crop rows recognition. INDEX TERMS Crop row recognition, real-time image processing, SoC FPGA.

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“…For simplifying the computation, we used the temporary parameters temp 0 and temp 1 to convert intersection computation into if-else method, which are expressed as Eq. (5)(6)(7)(8)(9).…”

Section: ) Row Density Modelmentioning

confidence: 99%

“…Nowadays, FPGA has a good development prospect in the image processing, and many image processing algorithms have been proposed based on FPGA architecture [6]- [9]. Some researchers [10] also developed embedded graphics processing unit (GPU) for precision weed management.…”

Section: Introductionmentioning

confidence: 99%

A New Automatic Real-Time Crop Row Recognition Based on SoC-FPGA

Zhang

et al. 2020

IEEE Access

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“…For instance, various methods based on pyramid transform [ 38 , 39 ] and wave transform [ 40 , 41 ] are widely implemented on FPGA to meet real-time requirements, but these methods can introduce the artifacts and lack the edge structures relatively. In addition, Furkan Aydin et al implement an image fusion method on FPGA using high-level synthesis (HLS) tools and other technologies based on color space transformation, mean, and variance [ 42 ] to improve the image’s color information, Ashutosh Mishra et al implement an image fusion method based on two-scale decomposition using average filter and fuse the detail layer using modified Frei-Chen operator [ 43 ]. These methods can achieve image fusion and get the good process speed on FPGA, but the performance of the fused image would be reduced and have influence of glare, smoke, etc.…”

Section: Introductionmentioning

confidence: 99%

A Real-Time FPGA Implementation of Infrared and Visible Image Fusion Using Guided Filter and Saliency Detection

Zhang

Yang

Wan³

et al. 2022

Sensors

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Taking advantage of the functional complementarity between infrared and visible light sensors imaging, pixel-level real-time image fusion based on infrared and visible light images of different resolutions is a promising strategy for visual enhancement, which has demonstrated tremendous potential for autonomous driving, military reconnaissance, video surveillance, etc. Great progress has been made in this field in recent years, but the fusion speed and quality of visual enhancement are still not satisfactory. Herein, we propose a multi-scale FPGA-based image fusion technology with substantially enhanced visual enhancement capability and fusion speed. Specifically, the source images are first decomposed into three distinct layers using guided filter and saliency detection, which are the detail layer, saliency layer and background layer. Fusion weight map of the saliency layer is subsequently constructed using attention mechanism. Afterwards weight fusion strategy is used for saliency layer fusion and detail layer fusion, while weight average fusion strategy is used for the background layer fusion, followed by the incorporation of image enhancement technology to improve the fused image contrast. Finally, high-level synthesis tool is used to design the hardware circuit. The method in the present study is thoroughly tested on XCZU15EG board, which could not only effectively improve the image enhancement capability in glare and smoke environments, but also achieve fast real-time image fusion with 55FPS for infrared and visible images with a resolution of 640 × 470.

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