Reactive ion etching induced damage with gas mixtures CHF3/O2 and SF6/O2

Abstract

Articles you may be interested inEffect of plasma polymerization film on reducing damage of reactive ion etched silicon substrates with CHF3+O2 plasmas J. Vac. Sci. Technol. B 15, 66 (1997); 10.1116/1.589257 Sidewall and surface induced damage comparison between reactive ion etching and inductive plasma etching of InP using a CH4/H2/O2 gas mixture Reactive ionetchinginduced damage in silicon using SF6 gas mixtures In this work, reaction ion etching ͑RIE͒ induced damage and its impact on device performance have been characterized and evaluated using a variety of characterization techniques for two technologically important gas mixtures: CHF 3 /O 2 for selective oxide etching, and SF 6 /O 2 for selective poly Si or crystalline Si etching. Current-voltage characteristics of Al/Si Schottky diodes fabricated on the RIE exposed Si surface reveal significant barrier height shifts for the CHF 3 /O 2 process while showing little change for the SF 6 /O 2 processes. Carrier generation lifetime is degraded by at least one order of magnitude, with the degradation due to CHF 3 /O 2 processes being more severe. Scanning electron microscopy and Auger electron spectroscopy support the idea that the defects that give rise to the altered electrical behavior are most likely Si lattice damage instead of metal contamination and/or morphologic modification. Rapid thermal annealing of the CHF 3 /O 2 etched samples has a negative effect on I -V recovery precluding simple application of RTA for removing RIE damage. In the RIE exposed oxide, the two distinctively different gas mixtures induce very similar C -V and Si/SiO 2 interface property changes, suggesting that the high energy photons present in the plasma glow are the most probable source of damage in the oxide.

Model for Bias Frequency Effects on Plasma-Damaged Layer Formation in Si Substrates

“…Physical damage is induced by high-energy ion bombardment incident on Si or other material surfaces. [2][3][4][5][6][7][8] This damage creates defects 3,4,[8][9][10] (such as Si vacancies, displaced Si atoms, interstitials, dangling bonds, and others) and the resultant damaged layer in Si substrate. One of the key practical problems respective to the physical damage is Si loss or the ''Si recess'' that is formed during steps in plasma processing such as gate, offset, and sidewall spacer etch steps.…”

Characterization techniques of ion bombardment damage on electronic devices during plasma processing—plasma process-induced damage

“…Current-voltage. Current-voltage (I-V ) measurement is usually conducted for PPD evaluation using the Schottky-contact metal-semiconductor (MS), 38,70,[86][87][88]171,172) pn junction, 44,127) and MOS structures. In I-V measurements, tunneling current or junction leakage is monitored.…”

Trade-Off Relationship between Si Recess and Defect Density Formed by Plasma-Induced Damage in Planar Metal–Oxide–Semiconductor Field-Effect Transistors and the Optimization Methodology

“…7,8) Physical damage is induced by high-energy ion bombardment on Si substrates or other material surfaces. [9][10][11][12][13][14][15] This physical damage creates ''defects'' such as Si-Si broken or strained bonds, displaced Si atoms, vacancies, and interstitial atoms in crystalline Si substrates. Physical damage has been extensively investigated in advanced MOSFETs since the penetration depth of incident ions is found to be difficult to decrease.…”