Real-time soft error rate measurements on bulk 40 nm SRAM memories: a five-year dual-site experiment

Abstract

This paper reports five years of real-time soft error rate experimentation conducted with the same setup at mountain altitude for three years and then at sea level for two years. More than 7 Gbit of SRAM memories manufactured in CMOS bulk 40 nm technology have been subjected to the natural radiation background. The intensity of the atmospheric neutron flux has been continuously measured on site during these experiments using dedicated neutron monitors. As the result, the neutron and alpha component of the soft error rate (SER) have been very accurately extracted from these measurements, refining the first SER estimations performed in 2012 for this SRAM technology. Data obtained at sea level evidence, for the first time, a possible correlation between the neutron flux changes induced by the daily atmospheric pressure variations and the measured SER. Finally, all of the experimental data are compared with results obtained from accelerated tests and numerical simulation.

A 32 nm single-ended single-port 7T static random access memory for low power utilization

“…For a differential bit cell, one bitline always discharges during read and write operations. Therefore, to reduce leakage and switching power consumption of the bit cell, single-ended SRAM bit cells are gaining attention [4][5][6][7]. Scaling the supply voltage (V DD ) is another convenient method to reduce dynamic power consumption [8].…”