Reduction of the self-forces in Monte Carlo simulations of semiconductor devices on unstructured meshes

Aldegunde, Manuel; Seoane, Natalia; García‐Loureiro, Antonio J.; Kálna, K.

doi:10.1016/j.cpc.2009.08.013

Cited by 21 publications

(12 citation statements)

References 20 publications

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“…The MC engine in this device simulator considers three anisotropic valleys (Γ, L, and X) with nonparabolic dispersion. The simulations of Si MOSFETs consider all relevant scattering mechanisms [14], [15] including acoustic phonons, intravalley (g-type and f -type) and intervalley (p-type) nonpolar optical phonons, interface roughness based on Ando's model [12], and ionized impurity scattering. The simulations of InGaAs MOSFETs consider the electron scattering with polar optical phonons, intervalley and intravalley optical phonons, nonpolar optical phonons, acoustic phonons, interface roughness, interface phonons at the dielectric/semiconductor interface [16], and ionized impurity scattering.…”

Section: MC Simulationsmentioning

confidence: 99%

Monte Carlo Study of Ultimate Channel Scaling in Si and In$_{\rm 0.3}$Ga$_{\rm 0.7}$As Bulk MOSFETs

Islam

Benbakhti

Kálna

2011

IEEE Trans. Nanotechnology

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A detailed analysis of nonequilibrium electron transport in n-type Si and In 0 .3 Ga 0 .7 As MOSFETs scaled into ultimate limit of 5-nm gate length is carried out using ensemble Monte Carlo device simulations. The analysis is based on simulations of I D -V G characteristics for a template, 25-nm gate length Si MOSFET compared against previous results from various Monte Carlo device codes, and for an equivalent 25-nm gate length In 0 .3 Ga 0 .7 As MOSFET. The transistors are then laterally scaled from a gate length of 25 nm to 20, 15, 10 and 5 nm monitoring the average electron velocity, energy, and sheet density along the channel at a supply voltage of 1.0 V. A degradation of the injection velocity with the scaling of a gate/channel length is observed. While we have found a decrease in the overall electron velocity profile along the Si channel for gate lengths smaller than 10 nm and a decrease in the injection velocity from a gate length of 20 nm, the increase in the intrinsic drain current in the scaling process is continuous thanks to the increasing velocity at the drain side. However, the velocity in the InGaAs channel MOSFETs increases steadily during the scaling but the increase in the intrinsic drain current is less pronounced. This is the result of a source starvation, due to a low density of states in III-V semiconductors, which cannot provide a large enough electron sheet density in the channel. This effect is partially mitigated by the enhancement of density of states as a proportion of electrons in the source/drain transfers to upper valleys with a larger electron effective mass.

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Section: MC Simulationsmentioning

confidence: 99%

Monte Carlo Study of Ultimate Channel Scaling in Si and In$_{\rm 0.3}$Ga$_{\rm 0.7}$As Bulk MOSFETs

Islam

Benbakhti

Kálna

2011

IEEE Trans. Nanotechnology

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“…Even though MC device simulators using tetrahedral elements have been presented in the past [4,5], to our best knowledge, the problem of the self-forces has been seldom considered [12,3]. In this work, we present a methodology to evaluate and suppress the self-forces in a finite element (FE) MC device simulator based on tetrahedral elements [5].…”

Section: Introductionmentioning

confidence: 96%

“…Monte Carlo (MC) methods have been widely used to simulate carrier transport in semiconductor devices [1][2][3]. As semiconductor devices are shrunk into deep nanoscale dimensions in order to boost their performance, the carrier transport becomes highly non-equilibrium requiring advanced physically based simulation models.…”

Section: Introductionmentioning

confidence: 99%

Energy conserving, self-force free Monte Carlo simulations of semiconductor devices on unstructured meshes

Aldegunde

Kálna

2015

Computer Physics Communications

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“…The impact of self-forces in semiconductor device particle simulations has been extensively studied in the past [1], [10], [3] and various methods have been proposed to minimise them. However, most of these works have achieved a satisfactory result only for orthogonal meshes [10].…”

Section: Introductionmentioning

confidence: 99%

Self-forces in 3D finite element Monte Carlo simulations of a 10.7 nm gate length SOI FinFET

Aldegunde

Kálna

2014

2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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Particle-mesh coupling in ensemble Monte Carlo simulations of semiconductor devices results in unphysical selfforces when using unstructured meshes to describe the device geometry. We develop a correction to the driving electric field and show that self-forces can be virtually eliminated on a finite element mesh at a small additional computational cost. The developed methodology is included into a self-consistent 3D finite element Monte Carlo device simulator. We simulate an isolated particle and show the kinetic energy conservation down to a magnitude of 10 −10 meV. The methodology is applied to a 10.7 nm gate length FinFET simulation and we find that for a large enough ensemble of particles, the impact of self-forces on the final ID-VG is almost negligible.

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Reduction of the self-forces in Monte Carlo simulations of semiconductor devices on unstructured meshes

Cited by 21 publications

References 20 publications

Monte Carlo Study of Ultimate Channel Scaling in Si and In$_{\rm 0.3}$Ga$_{\rm 0.7}$As Bulk MOSFETs

Monte Carlo Study of Ultimate Channel Scaling in Si and In$_{\rm 0.3}$Ga$_{\rm 0.7}$As Bulk MOSFETs

Energy conserving, self-force free Monte Carlo simulations of semiconductor devices on unstructured meshes

Self-forces in 3D finite element Monte Carlo simulations of a 10.7 nm gate length SOI FinFET

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