2013
DOI: 10.1149/05807.0017ecst
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Reliability of ALD Hf1-XZrxO2 Deposited by Intermediate Annealing or Intermediate Plasma Treatment

Abstract: The reliability of atomic layer deposited Hf1-xZrxO2 with x=0.8 on a SiON interfacial layer (IL) has been analyzed in detail for three different oxide deposition processes, (i) DADA: samples were subjected to dielectric deposition and thermal annealing in a cyclical process; (ii) DSDS: samples were subjected to similar cyclical process with dielectric deposition and exposure to Ar plasma; and (iii) As-Dep: the dielectric for the control samples was deposited without any intermediate step. Capacitance-voltage a… Show more

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Cited by 8 publications
(5 citation statements)
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References 43 publications
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“…5a). 7,15 Furthermore, the C-V characteristics show a typical partial inversion at 100 KHz ( Fig. 2a) and a complete inversion at 100 Hz ( Fig.…”
Section: Resultsmentioning
confidence: 93%
See 1 more Smart Citation
“…5a). 7,15 Furthermore, the C-V characteristics show a typical partial inversion at 100 KHz ( Fig. 2a) and a complete inversion at 100 Hz ( Fig.…”
Section: Resultsmentioning
confidence: 93%
“…[4][5][6] ALD Hf 1-x Zr x O 2 with different Hf to Zr compositions has been explored as an alternative of HfO 2 since the tetragonal phase which has higher dielectric constant can be stabilized. [7][8][9] In addition, in situ control of Hf/Zr precursor ratio during the ALD process, better film deposition and oxide growth rate, and better quality interfacial layer are critical for higher-k dielectrics with enhanced electrical performance and reliability. 10 Slot-plane-antenna (SPA) plasma treatment has been shown to enhance the CVD and ALD grown oxides quality and reliability along with better interfacial layer properties when the films were exposed to SPA plasma during or after the deposition.…”
mentioning
confidence: 99%
“…Therefore, it can be concluded that the combination of alloying with ZrO 2 and intermediate plasma exposure enhances the reliability characteristics while reducing EOT (19).…”
Section: Resultsmentioning
confidence: 99%
“…The formation of an interfacial layer results in capacitance reduction because such a layer has a low relative permittivity. 1–3 Additionally, interfacial layers induce leakage current degradation by acting as trap sites. The reliability of a DRAM capacitor is also deteriorated by its interfacial characteristics.…”
Section: Introductionmentioning
confidence: 99%