Reliability of Cu-plated through encapsulant vias (TEV) for 3D-integration

Abstract

Through encapsulant vias (TEVs) are an interconnect technology which enables 3D stacking and double sided re-routing of packages encapsulated with epoxy molding compound. These interconnects are formed by Cu-plated holes through the encapsulant and can typically be routed by an RDL (redistribution layer). In order to enable prolonged function of these interconnects, thermomechanical reliability has to be assured. Dedicated stress tests have to be conducted to evaluate lifetime under relevant testing conditions, then failure mechanisms have to be identified, understood and quantitatively condensed into a lifetime model to predict reliability for future designs. In order to assure a short time to market, accelerated tests (and corresponding acceleration factors) are urgently needed by industry and are the holy grail of reliability as an academic discipline. The idea presented in this paper is to substitute lengthy thermal cycling tests by results obtained by rapi d isothermal fatigue tests at different temperatures and establish a correlation between both of them. Based on physics of failure principles, the applicability and viability of such a concept then is evaluated and discussed.In conclusion, this work shows a consistent approach for acceleration of the design for reliability procedure in system integration. It is based on the now possible rapid generation of a lifetime model by thin metal layer samples which are easily manufacturable with the same technology as the TEVs. More data is needed to confirm the failure mechanisms in TEVs, reproducible samples for thermal cycling and to validate the applicability of the method also to other metal layers used in the electronic packaging industry

Challenges in the reliability of 3D integration using TSVs

“…So a vast variety in material data has been reported especially for plastic behavior of copper [7], [9], [14], [33]. The description of the plastic behavior varies throughout literature from a simple bilinear assumption to complete stress-strain curve -2/8-as shown in [34]. For the evaluation of a new technology it is imperative to measure the actual material properties for refining the model.…”

“…A cool down was simulated from a virtual temperature of 120°C assumed stress free to room temperature. The used material parameters are shown on table l. Silicon is assumed to behave purely elastic while the plastic behavior of copper is taken into account by using the stress vs. strain data published in [34] that can be seen in figure 5. The data was measured by tensile testing of dog's bone test specimen.…”

“…Additionally to the reliability issues that arise from the Figure 5: Stress vs. strain behavior of electroplated copper of 5J1m thickness [34] presence of the TSVs also the influence of additional interconnects have to be taken into account. With the integration of water for liquid cooling also further struc tures need to be integrated for sealing of the electrical active interconnects from the conductive liquid.…”

Accelerated reliability testing and modeling of subsystems based on sintered silver thermal interface materials

“…Due to the nature of polycrystalline kinematic hardening behaviour of the silver and that we expected to have a smooth yielding, the Ramberg-Osgood law, given by (1), describes the elasto-plastic material plot adequately.…”