Reliability of HfSiON as gate dielectric for advanced CMOS technology

Wang, H.C.-H.; Tsai, Cary Chi‐Liang; Chen, Shang-Jr; Chan, Chuan-Tsung; Lin, H.J.; Jin, Y.; Tao, Hun-Jan; Chen, Shih-Chang; Diaz, C.H.; Ong, Tongchern; Oates, A. S.; Liang, Mong–Song; Chi, Min-Hwa

doi:10.1109/.2005.1469255

Cited by 12 publications

(13 citation statements)

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“…High-k bulk trap generation is suppressed in the optimal samples. Detailed comparisons and discussions are summarized in [15]. The two devices have almost identical I d −V g characteristic, as shown in the inset of Fig.…”

Section: Process Effectmentioning

confidence: 82%

“…• C annealing of source/drain dopant activation [15]. The time-to-breakdown, hot carrier, and PBTI lifetime are improved, with other parameters such as V t and gate leakage current not adversely affected.…”

Section: Process Effectmentioning

confidence: 99%

“…Appropriate nitrogen incorporation into Hf-silicate can substantially improve the gate dielectric electrical reliability [15]. To evaluate the nitrogen effect on HfSiON nMOSFET degradation, two devices, i.e., "optimal" versus "control," which have different nitrogen profiles in the HfSiON gate dielectric, are compared.…”

Section: Process Effectmentioning

confidence: 99%

“…Unlike SiO 2 CMOS where negative bias temperature instability (NBTI) in pMOSFETs is considered to be a dominant reliability constraint [14], positive bias temperature instability (PBTI) in high-k nMOSFETs actually dictates device lifetime [15]. PBTI in HfSiON nMOSFETs arises from trap charging and creation in the high-k layer [9]- [13].…”

Section: Introductionmentioning

confidence: 99%

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Characteristics and physical mechanisms of positive bias and temperature stress-induced drain current degradation in HfSiON nMOSFETs

Chan

Tang

Wang

et al. 2006

IEEE Trans. Electron Devices

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Abstract-Drain current degradation in HfSiON gate dielectric nMOSFETs by positive gate bias and temperature stress is investigated by using a fast transient measurement technique. The degradation exhibits two stages, featuring a different degradation rate and stress temperature dependence. The first-stage degradation is attributed to the charging of preexisting high-k dielectric traps and has a log(t) dependence on stress time, whereas the second-stage degradation is mainly caused by new high-k trap creation. The high-k trap growth rate is characterized by two techniques, namely 1) a recovery transient technique and 2) a chargepumping technique. Finally, the effect of processing on high-k trap growth is evaluated.Index Terms-HfSiON, positive bias temperature instability (PBTI), transient measurement, trap generation, two-stage degradation.

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Section: Process Effectmentioning

confidence: 82%

Section: Process Effectmentioning

confidence: 99%

Section: Process Effectmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Characteristics and physical mechanisms of positive bias and temperature stress-induced drain current degradation in HfSiON nMOSFETs

Chan

Tang

Wang

et al. 2006

IEEE Trans. Electron Devices

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“…Besides the negative-bias temperature instability (NBTI) effect, the high-k/metal gate stack also suffers from the positive-bias temperature instability or PBTI effect, which can adversely impact the performance of the n-MOSFET [1], [2]. The PBTI effect remains a major concern of mature highk/metal gate stack technology [3], [4].…”

Section: Introductionmentioning

confidence: 98%

On electron-trap transformation and its unexpected frequency dependence under dynamic positive-bias temperature stressing

Tung

Ang

Gao

2014

2014 IEEE International Reliability Physics Symposium

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In the course of our study on the frequency dependence of dynamic positive-bias temperature instability (PBTI) in the HfO 2 /TiN gate n-MOSFET, an unexpected result was obtained. In accordance with our recent study, electron trapping is observed to gradually evolve into a more permanent form, suggesting that some shallow electron traps are converted into deeper ones as the PBTI stress progresses. Interestingly, however, this evolution is found to exhibit a positive dependence on the gate frequency, i.e. the fraction of electron trapping that is rendered more permanent is increased with the gate frequency over the range of frequency studied (1 mHz -1 MHz).

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Channel hot-carrier degradation in pMOS and nMOS short channel transistors with high-k dielectric stack

Amat

Kauerauf

Degraeve

et al. 2010

Microelectronic Engineering

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Reliability of HfSiON as gate dielectric for advanced CMOS technology

Cited by 12 publications

References 0 publications

Characteristics and physical mechanisms of positive bias and temperature stress-induced drain current degradation in HfSiON nMOSFETs

Characteristics and physical mechanisms of positive bias and temperature stress-induced drain current degradation in HfSiON nMOSFETs

On electron-trap transformation and its unexpected frequency dependence under dynamic positive-bias temperature stressing

Channel hot-carrier degradation in pMOS and nMOS short channel transistors with high-k dielectric stack

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