Reliable Memristor Based on Ultrathin Native Silicon Oxide

Abstract

Memristors based on two-dimensional (2D) materials can exhibit great scalability and ultralow power consumption, yet the structural and thickness inhomogeneity of ultrathin electrolytes lowers the production yield and reliability of devices. Here, we report that the self-limiting amorphous SiO x (∼2.7 nm) provides a perfect atomically thin electrolyte with high uniformity, featuring a record high production yield. With the guidance of physical modeling, we reveal that the atomic thickness of SiO x enables anomalous resistive switching with a transition to an analog quasi-reset mode, where the filament stability can be further enhanced using Ag–Au nanocomposite electrodes. Such a picojoule memristor shows record low switching variabilities (C2C and D2D variation down to 1.1 and 2.6%, respectively), good retention at a few microsiemens, and high conductance-updating linearity, constituting key metrics for analog neural networks. In addition, the stable high-resistance state is found to be an excellent source for true random numbers of Gaussian distribution. This work opens up opportunities in mass production of Si-compatible memristors for ultradense neuromorphic and security hardware.

Analog Tunnel Memory Based on Programmable Metallization for Passive Neuromorphic Circuits

“…However, our group has recently found that native SiO x might be a promising candidate for memristive applications as a highly uniform and atomically thin switching medium. 6 Interestingly, during the reactive sputtering of the MPL, energetic oxygen atoms bombard into native SiO x and additionally oxidize a few layers of Si atoms in the immediate proximity of the native SiO x /p ++ -Si interface. This is confirmed by the increased oxide thickness (∼4.7 nm; Figure 1f) and a greater brightness contrast against the pristine SiO x layer, which is attributable to strong negative charging during the plasma oxidation.…”

“…On the other hand, it is well-known that the Si surface has a native as-grown SiO x layer (∼2.7 nm in our case; Figure e), which has been widely considered as a detrimental effect for applications. However, our group has recently found that native SiO x might be a promising candidate for memristive applications as a highly uniform and atomically thin switching medium . Interestingly, during the reactive sputtering of the MPL, energetic oxygen atoms bombard into native SiO x and additionally oxidize a few layers of Si atoms in the immediate proximity of the native SiO x /p ++ -Si interface.…”

“…Oxide-based resistive random-access memory (RRAM) and in-memory computing systems have recently gained great interest for hardware implementation of artificial neural networks. , On the basis of the switching mechanism, oxide-based RRAMs can be generally classified into two types: filamentary RRAM and interfacial RRAM. The conductance of a filamentary RRAM depends upon the formation and rupture of the localized conductive filament (CF) consisting of a chain of oxygen vacancies (V O •• ) or metallic atoms, as shown in the left panel of Figure a. − While these devices exhibit a large memory window, fast switching speed, and good retention, they suffer from unavoidable variability as a result of the probabilistic nature of filament dynamics, − which would inevitably degrade the system performance in most cases. Currently, additional transistors are often required to not only regulate the analog conductance but also eliminate the sneak current in crossbar arrays, leading to a large circuit footprint and high power consumption. − On the other hand, interfacial RRAM operates on the basis of adjusting the Schottky or tunneling barrier at the active electrode–oxide or oxide–oxide interfaces, via charge injection or oxygen vacancy migration (middle panel of Figure a). , In general, the interface-type RRAM demonstrates analog switching behavior and substantially higher device-to-device (D2D) and cycle-to-cycle (C2C) uniformity than that of filamentary RRAMs as a result of homogeneous changes through the oxides. , Particularly, the highly nonlinear current–voltage ( I – V ) characteristics may allow for operating a passive crossbar array without the need for transistors or selector devices. , However, the low V O •• mobility inside an oxide switching layer and the high depolarization field after charge redistribution present a significant challenge for operation speed and data retention of interfacial RRAMs. ,, Therefore, a RRAM with high uniformity and large nonlinearity in I – V behavior while maintaining fast operation speed and good retention remains elusive.…”

“…Furthermore, the MPL permits the modulation of the thin tunneling oxide with fast switching properties and long data retention, by facilitating the high mobility of Ag , and overcoming the rapid depolarization from charged defects. Here, we select amorphous SiO x as the tunnel oxide because of its near-perfect interface with the Si substrate and extreme compatibility with complementary metal–oxide–semiconductor (CMOS) processing. , Interface characterization reveals that the reactive sputtering of MPL extends the thickness of the SiO x layer via atomic oxidation, thus further rendering a high-quality tunnel barrier. Detailed experimental results combined with atomistic simulations confirm that the current level of the device is limited by a Fowler–Nordheim (F–N) tunneling barrier, of which properties can be effectively changed by collectively moving Ag nanocrystals in and out of the tunnel oxide.…”

High‐Performance and Environmentally Robust Multilevel Lead‐Free Organotin Halide Perovskite Memristors

“…In recent years, a wide variety of semiconductor materials have been proposed to build memristors including chalcogenides, [ 6 ] metal nitrides, [ 7 ] silicon oxides, [ 8 ] perovskite oxides, [ 9 ] and halide perovskites. [ 10 ] Despite the respective preponderances in their characteristics, chalcogenides, and metal nitrides have high requirements for the preparation process, while silicon oxide‐based devices typically require high operating voltages.…”