Research on IEEE 754 Standard Single Precision Floating Point Multipliers Designed using Urdhva Triyagbhyam Sutra of Vedic Mathematics

Abstract

Duplication of the coasting element numbers is the big activity in automated signal handling. So the exhibition of drifting problem multipliers count on a primary undertaking in any computerized plan. Coasting factor numbers are spoken to utilizing IEEE 754 modern day in single precision(32-bits), Double precision(sixty four-bits) and Quadruple precision(128-bits) organizations. Augmentation of those coasting component numbers can be completed via using Vedic generation. Vedic arithmetic encompass sixteen wonderful calculations or Sutras. Urdhva Triyagbhyam Sutra is most usually applied for growth of twofold numbers. This paper indicates the compare of tough work finished via exceptional specialists in the direction of the plan of IEEE 754 ultra-modern-day unmarried accuracy skimming thing multiplier the usage of Vedic technological statistics.

Edge Computing-Based SAT-Video Coding for Remote Sensing

“…To implement the quantization function in Step 4 [19], the divider must process 24 times to obtain a 24-bits quotient to then obtain a single-precision floating-point, following the single-precision-floating point criterion from IEEE 754 standard single-precision floating-point multipliers designed [21]. The output of the division module is stored in 32 bits.…”

“…The quantization method [19] implementation with the single-precision-floating point criterion (IEEE 754) and the proposed quantization division (integer-to-integer) module are compared in Table 1. Table 1 also compares simulation hardware and power resources between Q/IQ division [19] module with [21] and the proposed Q/IQ division module, implemented on Xilinx Kintex-7 XC7K410T. The use of hardware resource and power consumption are reduced by 71.99% and 55.76%, respectively.…”