Review—Device Assessment of Electrically Active Defects in High-Mobility Materials

Abstract

The stringent device performance specifications of advanced scaled down technologies necessitates the implementation of high mobility substrates such as SiGe, Strained Si (sSi), Ge, sGe and/or III-V materials like GaAs, InGaAs. The control of the stress-induced defects remains a key challenge. Simple device structures such as capacitors, diodes and transistors are used to assess the electrical activity of extended defects (dislocations; antiphase boundaries; …) in high-mobility channel materials. Beside junction current analyses and lifetime studies, also the use of low-frequency noise characterization is reported. Special case studies are discussed to illustrate the used methodology. The potential of TCAD studies to better understand the electrical defect activity is also briefly addressed.

Diffusion and Dopant Activation in Germanium: Insights from Recent Experimental and Theoretical Results

“…Other dopants such as Sn or lead Pb have been used in defect engineering strategies to contain the fast diffusion of n-type dopants in Ge [20,36,53,54]. The interest in isovalent doping stems also from the interest to employ group IV binary (for example Si 1-x Ge x , Sn 1-x Ge x ) and/or ternary (for example Si 1-x-y Ge x Sn y ) alloys in devices [55].…”

Technology development challenges for advanced group IV semiconductor devices

“…The real potential of hybridization is using selective epitaxial growth on a 300 mm Si platform . A key issue for good device performance is the overall defect control . An alternative to the ART technique is called Confined Epitaxial Lateral Overgrowth (CELO) .…”

GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes

“…When present, dislocations introduce deep states in the band gap, which give rise to generation-recombination of excess carriers [3], degrading several device parameters [4], [5] such as the threshold voltage (V T ), junction leakage current, and the inversion-layer mobility. Considering germanium for future node p-channel transistors, several strategies can be followed to reduce the TD density [6]. The different schemes studied in this work are outlined in Fig.…”