Review on 3D growth engineering and integration of nanowires for advanced nanoelectronics and sensor applications

Hu, Ran; Yu, Linwei

doi:10.1088/1361-6528/ac547a

Cited by 5 publications

(3 citation statements)

References 139 publications

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“…Si MWs can be fabricated using a variety of methods, including chemical etching, electrochemical etching, and vapor-liquid-solid growth. However, it is typically fabricated by using lithography and etching techniques (top-down), or bottom-up self-assembly approaches and they can have diameters ranging from a few nanometers to several micrometers [22]. Xiaomeng Zhang et al successfully fabricated microscale Si structures with ultra-high aspect ratio and smooth sidewalls on a four-inch wafer using metal-assisted chemical etching.…”

Section: Si Mw Fabrication Processmentioning

confidence: 99%

In-plane synthesis of silicon microwires array for optoelectronic and microelectronic applications; a TCAD study

Jahromi,

Sanaei

2023

Preprint

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Silicon microwires have been used in various applications such as sensors, solar cells, and lithium-ion batteries due to their high surface area-to-volume ratio and good electrical conductivity. One of the interesting challenges in microelectronics and photovoltaics is the creation of interspacing, laterally oriented silicon arrays on SiO2 substrate for semiconductor devices with multi-function. Silicon microwires array is a type of microstructure with unique optical and electrical properties that makes it useful for various applications. The fabrication of such structures is still a serious technological problem and requires searching for new approaches and techniques. In this work, we report a CMOS compatible approach for synthesis of in-plane Si microwires array on SiO2 substrate. The approach is a combination of micro-photolithography, oxidation, and etching techniques that are all compatible with standard CMOS fabrication processes. We found that dray oxidation leads to desirable results, and the process will be successful at 1575 degree Celsius after 120 minutes. The resulted Si microwires array are then processed to be used in the channel of a MOSFET for microelectronic application as a sensor. The excellent performance of the designed MOSFET proves formation of the desired Si microwires array which can be used in the structure of any microelectronic devices and sensors. All simulations were performed using TCAD Silvaco software.

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Section: Si Mw Fabrication Processmentioning

confidence: 99%

In-plane synthesis of silicon microwires array for optoelectronic and microelectronic applications; a TCAD study

Jahromi,

Sanaei

2023

Preprint

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“…Semiconductor nanowire arrays are one-dimensional nanostructures that have drawn a great deal of attention over the past decade [1][2][3][4][5]. Through efficient carrier confinement in two dimensions and excitation of radial and longitudinal optical modes, many applications and functionalities have been enabled by semiconductor nanowire arrays [6].…”

Section: Introductionmentioning

confidence: 99%

Extracting optical absorption characteristics from semiconductor nanowire arrays

Kohandani

Saini

2022

Nanotechnology

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A method based on extraction of effective absorption coefficient using Beer-Lambert’s law on simulated transmissions is used to understand optical absorption characteristics of semiconductor nanowire arrays. Three different semiconductor nanowire arrays viz. silicon (Si), gallium arsenide (GaAs), and amorphous silicon (a-Si) were evaluated using the method. These semiconductors are chosen since two of them have similar real parts of the refractive index in the visible range, while the other two have comparable imaginary parts of the refractive index in the visible range. In this way, we can examine the role of the real and imaginary part of the refractive index in enhancing the absorption characteristics in nanowire arrays due to the excitation of radial and photonic Bloch modes. We have observed that high absorption peaks at modal resonances also correspond to resonance peaks in reflections from the nanowire-air interface. Further, the wavelengths of these two peak resonances are slightly detuned according to the Kramers-Kronig relation for an oscillator system. The study confirms that the resonance wavelengths of radial HE modes are diameter and refractive index dependent. The study extends the understanding to the absorption characteristics due to the excitation of the photonic Bloch modes due to near field coupling. Excitation of Bloch modes leads to increased absorption and quality factor as compared to only the radial mode excitation. We also conclude that the imaginary part of the refractive index of the semiconductor influence the diameters at which Bloch modes are excited for a given lattice spacing. We observed that semiconductors with a higher bulk value of absorption coefficient need to be ordered denser in the nanowire array to be able to excite the photonic crystal modes within the array. Interestingly, we have seen that for Si, GaAs, and a-Si arrays with an equal diameter of 80 nm and lattice spacing of 400 nm, the peak absorption is almost the same, even when GaAs and a-Si are highly absorptive materials compared to the Si. Thus, both radial and Bloch mode excitations can be used to design absorption profiles in a semiconductor nanowire array.

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“…Subsequently, micro-Raman spectroscopy was widely used to study the stress in micrometer-sized structures [15][16][17][18][19]. With the semiconductor device approaching nanometer size, it is reported that there was no stress in vertically grown SiNWs [20,21]. While stress is essential in GAA NS transistor fabricated by CMOS process [22], the stress characterization by Raman spectroscopy is of great potential, but has not been fully investigated yet.…”

Section: Introductionmentioning

confidence: 99%

A non-destructive channel stress characterization for gate-all-around nanosheet transistors by confocal Raman methodology

Huang¹,

Liu²,

Yang³

et al. 2022

NSO

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Non-destructive stress characterization is essential for gate-all-around (GAA) nanosheet (NS) transistors technology, while it is a big challenge to be realized on nanometer-sized GAA devices by using traditional Micro-Raman spectroscopy due to its light spot far exceeding the device. In this work, a non-destructive stress characterization methodology of confocal Raman spectroscopy was proposed and performed for GAANS device fabrication. Channel stress evolution along the fabrication process was successfully characterized by designing high-density NS array and analyzing the linear scanned spectra in different structures. The related mechanism of stress evolution was systematically studied by Sentaurus process simulation. Additionally, applying this methodology on detecting the bending of suspended NS after channel release process was demonstrated. Therefore, this work might provide a promising solution to realize in-line characterization of channel stress in GAA NS transistors and process monitor of NS channel integrity.

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Review on 3D growth engineering and integration of nanowires for advanced nanoelectronics and sensor applications

Cited by 5 publications

References 139 publications

In-plane synthesis of silicon microwires array for optoelectronic and microelectronic applications; a TCAD study

In-plane synthesis of silicon microwires array for optoelectronic and microelectronic applications; a TCAD study

Extracting optical absorption characteristics from semiconductor nanowire arrays

A non-destructive channel stress characterization for gate-all-around nanosheet transistors by confocal Raman methodology

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