Rigorous Extraction of Process Variations for 65-nm CMOS Design

Delay Test for Diagnosis of Power Switches

“…6. The effect of process variation is incorporated by the process variation permutation generator, which uses the results reported in a recent study to incorporate the effect of process variation [17]. This study has recognized three transistor parameters as leading sources of process variation, which include: gate length (L), threshold voltage (V th ), and effective mobility (µ ef f ) 1 .…”

“…These parameters follow Gaussian distribution (±3σ variation) with standard deviations of 4% for L, 5% for V th and 21% for µ ef f . Negligible spatial correlation is found between these parameters, i.e., they can be treated as independent random variables following Gaussian distribution [17]. Note the parameter fluctuations (correlated or otherwise) do not imply that these parameters are independent, for example as L decreases, V th also decreases, this effect is also known as V th roll-off [16].…”

A Fast and Accurate Process Variation-Aware Modeling Technique for Resistive Bridge Defects

“…These two RBF models [1], [2] are intended for designs operating in nominal conditions, however due to continuous scaling of CMOS, DSM designs are affected by process variation [3], [4]. Fabrication process variation is mainly due to sub-wavelength lithography, random dopant distribution, line edge roughness and stress engineering [5], [6]. In a recent study, it has been shown that more than 30% error in the drive current of a transistor is observed on a 65-nm device due to process variation, when compared to a transistor operating in nominal condition [6].…”

“…Fabrication process variation is mainly due to sub-wavelength lithography, random dopant distribution, line edge roughness and stress engineering [5], [6]. In a recent study, it has been shown that more than 30% error in the drive current of a transistor is observed on a 65-nm device due to process variation, when compared to a transistor operating in nominal condition [6]. Process variation also affects the behaviour of a resistive bridge defect [7].…”

“…1, I 1 , I 2 and I 3 ). The effect of process variation is modeled by incorporating fluctuations in three transistor parameters: gate length (L), threshold voltage (V th ) and effective mobility (µ ef f ) 1 as reported in a recent study [6]. The effect of voltage variation is directly applied by changing the supply voltage; finally, the effect of temperature variation is incorporated by using temperature dependent transistor models of threshold voltage, mobility and saturation velocity using BSIM4 [10].…”