Roadmap for On-Board Processing and Data Handling Systems in Space

Furano, Gianluca; Menicucci, A.

doi:10.1007/978-3-319-54422-9_10

Cited by 34 publications

(24 citation statements)

References 2 publications

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“…As explained by Furano et al [45], taking into consideration the limitations of available ASIC technology, the overall computational performance of devices can be increased by means of mono-core devices with higher frequencies, new architectures, Deep Submicron (DSM) and multi-core technologies. The scope of this survey are new architectures, DSM and multi-core technologies.…”

Section: Discussionmentioning

confidence: 99%

“…In this context, multi-core devices are becoming dominant, with space industry considering increasingly parallel hardware devices such as the Next-Generation Microprocessor (NGMP) [153]. The landscape of future computing devices for space for on-board processing is analyzed in [45]. Apart from the aforementioned NGMP device, authors also identify the RAD5500 processor family, a radiation-hardened processor based on the e5500 core of the QorIQ Power Architecture processor.…”

Section: Space Domainmentioning

confidence: 99%

“…Apart from the aforementioned NGMP device, authors also identify the RAD5500 processor family, a radiation-hardened processor based on the e5500 core of the QorIQ Power Architecture processor. For instance, the RAD5545 processor employs four RAD5500 cores and uses 45 nm technology [45].…”

Section: Space Domainmentioning

confidence: 99%

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Multi-core Devices for Safety-critical Systems

et al. 2020

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Multi-core devices are envisioned to support the development of next-generation safety-critical systems, enabling the on-chip integration of functions of different criticality. This integration provides multiple system-level potential benefits such as cost, size, power, and weight reduction. However, safety certification becomes a challenge and several fundamental safety technical requirements must be addressed, such as temporal and spatial independence, reliability, and diagnostic coverage. This survey provides a categorization and overview at different device abstraction levels (nanoscale, component, and device) of selected key research contributions that support the compliance with these fundamental safety requirements.

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Section: Discussionmentioning

confidence: 99%

Section: Space Domainmentioning

confidence: 99%

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Multi-core Devices for Safety-critical Systems

et al. 2020

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“…The use of System-on-Chip (SoC) solutions in the design of space-borne data handling systems is an important step towards further miniaturization in space. In cubesats and in many aggressive commercial missions, use of Commercial Off-The-Shelf components is becoming the rule, rather than the exception and many of those are complex SoC, MPSoC (multiprocessor system-on-chip), SiP (System in package) or AMS-SoC (Analog/Mixed Signal SoC) [1]. It is well known that the possible sources of failure of these devices are Single Event Effects (SEE) [2], [3] and Total Ionizing Dose (TID) [4], [5].…”

Section: Introductionmentioning

confidence: 99%

“…In this work we used the solution addressed by [7] Fig. 1. Chip radiography which makes use a 90 Sr/ 90 Y on-chip beta source for TID testing.…”

Section: Introductionmentioning

confidence: 99%

Simplified Procedures for COTS TID Testing: A Comparison Between ⁹⁰Sr and ⁶⁰Co

Menicucci

Malatesta²,

Capua

et al. 2018

2018 IEEE Nuclear &Amp; Space Radiation Effects Conference (NSREC 2018)

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The tolerance to the cumulative effects of ionizing radiation is one of the most important parameters to keep into account when selecting an EEE component for space applications. TID sensitivity is normally investigated measuring changes induced by gamma rays from 60 Co sources to nominal parameters of a component or to its expected functional behavior. In this work we propose an on-chip 90 Sr/ 90 Y electron source as an alternative methodology for TID tests. 60 Co and 90 Sr/ 90 Y TID test setups for a complex SoC are compared in terms of complexity and of experimental results, investigating the use of a 90 Sr/ 90 Y as well as the established 60 Co. We show that 90 Sr allows a simpler test setup, manages to reproduce specific modes of failure obtained with 60 Co and causes failures at comparable total doses. This makes 90 Sr an interesting alternative to 60 Co qualification and the use of untested components, to be further investigated especially for complex COTS SoCs.

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