Role of Sub-Nanometer Dielectric Roughness on Microstructure and Charge Carrier Transport in α,ω-Dihexylsexithiophene Field-Effect Transistors

Abstract

The effect of dielectric roughness on the microstructure evolution of thermally evaporated α,ω-dihexylsexithiophene (α,ω-DH6T) thin films from a single molecular layer to tens of monolayers (ML) is studied. Thereby, the surface roughness of dielectrics is controlled within a sub-nanometer range. It is found that the grain size of an α,ω-DH6T ML is affected by dielectric roughness, especially for 1.5 ML, whereby the transistor performance is barely influenced. This can be attributed to a domain interconnection in the second layer over a long-range formed on the rough surface. With deposition of more layers, both microstructure and charge carrier transport exhibit a roughness-independent behavior. The structural characterization of α,ω-DH6T 10 ML by grazing-incidence wide-angle X-ray scattering reveals that the interlayer distance is slightly decreased from 3.30 to 3.15 nm due to a higher roughness, while an unchanged π-stacking distance is in excellent agreement with the roughness-independent hole mobility. This study excludes the influence of molecular-solvent interaction and preaggregation taking place during solution deposition, and provides further evidence that the microstructure of the interfacial layer of organic semiconductors has only minor impact on the bulk charge carrier transport in thicker films.

Parylene C as a versatile dielectric material for organic field-effect transistors

“…This suggests that the device performance will not be impaired by surface roughness as long as a conformal deposition of the semiconductor layer is guaranteed. These results are in agreement with the reports presented for a series of transistors with silicon/silicon dioxide substrates of various surface roughness [ 47 – 49 ]. It was found, that charge-carrier transport in relatively thick (multilayer) semiconducting films, obtained by thermal evaporation [ 47 ] or from solution [ 48 ] is insensitive to the substrate roughness.…”

“…These results are in agreement with the reports presented for a series of transistors with silicon/silicon dioxide substrates of various surface roughness [ 47 – 49 ]. It was found, that charge-carrier transport in relatively thick (multilayer) semiconducting films, obtained by thermal evaporation [ 47 ] or from solution [ 48 ] is insensitive to the substrate roughness. However, in thin monolayer semiconductor films the surface roughness significantly influences the charge-carrier transport [ 49 ].…”

Low temperature atomic layer deposition of zirconium oxide for inkjet printed transistor applications

“…For device applications, surface irregularity can inuence adhesion and transport properties. 37 The surface topology of the lms was studied using atomic force microscopy (AFM). The RMS surface roughness curves in Fig.…”

Interface Engineering in Organic Field-Effect Transistors: Principles, Applications, and Perspectives

“…However, there has been a long-standing debate about the interfacial roughness effect on device performance. In monolayer transistors, the charge-carrier transport exhibits a strong dependence on the dielectric roughness, , which was attributed to the higher densities of grain boundaries, charge trapping sites, and surface scattering induced by the rougher surface. In multilayer transistors, however, the situations are complicated.…”