This paper has demonstrated a high-quality HfO 2based gate stack by depositing atomic-layer-deposited HfAlO x along with HfO 2 in a layered structure. In order to get a multifold enhancement of the gate stack quality, both Al percentage and distribution were observed by varying the HfAlO x layer thickness and its location in the gate stack. It was found that < 2% Al/(Al + Hf)% incorporation can result in up to 18% reduction in the average EOT along with up to 41% reduction in the gate leakage current, as compared to the dielectric with no Al content. On the other hand, excess Al presence in the interfacial layer moderately increased the interface state density D it . When devices were stressed in the gate injection mode at a constant voltage stress, the dielectrics with Al/(Hf+Al)% < 2% showed resistance to stressinduced flatband voltage shift ΔV F B , and stress-induced leakage current. The time-dependent dielectric breakdown characteristics showed a higher charge to breakdown and an increase in the extracted Weibull slope β, which further confirms an enhanced dielectric reliability for devices with < 2% Al/(Al + Hf)%.
Index Terms-Equivalent oxide thickness (EOT), HfAlO x , interface state density (D it ), stress-induced flatband voltage shift (ΔV F B ), stress-induced leakage current (SILC), time-dependent dielectric breakdown (TDDB).