“…[5,6]). Recent technology mappers are based on the notion of cuts [7,8], which we review here. The combinational portion of a circuit can be represented by a directed acyclic graph (DAG) G(V, E), where each node, z ∈ V , represents a single-output logic function and edges between nodes, e ∈ E, represent input/output dependencies among the corresponding logic functions.…”