Scalability issue in Ti/HfO bipolar resistive memory with 1T-1R configuration by resistance pinning effect during 1^st RESET and its solution

The Role of Ti Buffer Layer Thickness on the Resistive Switching Properties of Hafnium Oxide-Based Resistive Switching Memories

“…As we know, the T3 memory device required higher V F compared to the T5 device due to the presence of lower oxygen vacancy concentration into the HfO x dielectrics as explained in the previous sections. Thus, the higher V F may induce the T3 memory cell into CRS after the FORMING operation . To increase the density of the simple MIM structure RRAM for future NVM applications; however, the memory device can be implemented in passive crossbar arrays, whereas the resistive switching materials are sandwiched between a series of perpendicular bottom and parallel top electrodes .…”

“…Thus, the higher V F may induce the T3 memory cell into CRS after the FORMING operation. 47 To increase the density of the simple MIM structure RRAM for future NVM applications; however, the memory device can be implemented in passive crossbar arrays, whereas the resistive switching materials are sandwiched between a series of perpendicular bottom and parallel top electrodes. 3 Thus, using the concept of crossbar architecture, theoretically, by increasing the number of stacking layers, the integration density can be further decreased to 4F 2 /n, where F is the minimum feature size, and n is the number of stacking layers of the crossbar arrays.…”

“…The increase of LRS during cycling tests can be explained by the worn filament model as discussed in a previous study. 41,47 Although the T5 memory device shows CRS properties with continuing cycles at higher I CC 's, we are not interested in operating the memory device at such high programming current because of considering for low power application. As we have seen in the typical case after FORMING and RESET operations, the T5 memory device shows stable BRS properties starting from ∼10 μA I CC by applying the sweeping voltage as follows: 0 8.…”

Resistance instabilities in a filament-based resistive memory

“…Fig. 15 shows that we have also successfully triggered the CRS-type behavior in a bipolar RRAM cell, with negative SET following a positive RESET or even after forming [16]. Although CRS is desirable for high-density memory arrays bypassing the use of transistors, a CRS array would have to be designed differently from a conventional bipolar RRAM array.…”

“…As the RRAM fabrication likely makes use of a post-metallization anneal (PMA) [13], any non-uniformity or variation in this process could lead to non-uniform excess vacancy generation during elevated temperature stress. Other important variability considerations are reductant thickness [14] and width [15] as well as composition of the reductant [16].…”