2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS) 2020
DOI: 10.1109/dcis51330.2020.9268669
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Selection of SRAM Cells to improve Reliable PUF implementation using Cell Mismatch Metric

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“…In literature [2], [28], [29], error-correction techniques were implemented for PUF post-processing to revert PUF data, which intensified the PUF reproducibility with external storage. A trimming method implemented by data remanence-based technique was proposed in [30]. In this approach, the strongest "1" and strongest "0" cells in a large-scale SRAM array can be identified in 2 times of power-ups by writing "1" or "0" to the entire array and recording the bit flip position after a short break in power.…”
Section: Introductionmentioning
confidence: 99%
“…In literature [2], [28], [29], error-correction techniques were implemented for PUF post-processing to revert PUF data, which intensified the PUF reproducibility with external storage. A trimming method implemented by data remanence-based technique was proposed in [30]. In this approach, the strongest "1" and strongest "0" cells in a large-scale SRAM array can be identified in 2 times of power-ups by writing "1" or "0" to the entire array and recording the bit flip position after a short break in power.…”
Section: Introductionmentioning
confidence: 99%